Abstract
High throughput and power-efficient processor-memory communications are of great importance for kilo-core processor design. This paper proposes a hybrid photonic architecture for such communications. Bandwidth-efficient photonic burst switching is used for memory accesses between last-level HBM caches and off-chip HMC memory pools. Simulation results show that the hybrid network achieves up to 25% of system speedup and up to 10 times of energy savings, when compared to conventional electric interconnects.
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References
Agerwala, T.: Exascale computing: the challenges and opportunities in the next decade. In: 16th Proceedings of the IEEE Symposium on HPCA, p. 1 (2010)
TILEGx Homepage. http://www.tilera.com/products/TILE-Gx.php. Accessed 29 Dec 2011
Zhang, C.: Mars: a 64-core ARMv8 processor. In: 27th Hot Chips (2015)
Borkar, S.: Thousand core chips: a technology perspective. In: Proceedings of the 44th ACM/IEEE Design Automation Conference, pp. 746–749 (2007)
Sanchez, D., et al.: An analysis of on-chip interconnection networks for large-scale chip multiprocessors. ACM Trans. Archit. Code Optim. 7(1), 4 (2010)
JEDEC Homepage. https://www.jedec.org/. Accessed 21 June 2017
HMC Homepage. http://www.hybridmemorycude.org/. Accessed 21 June 2017
Qiao, C.M., Yoo, M.S.: Optical burst switching (OBS) - a new paradigm for an optical internet. J. High Speed Netw. 8(1), 69–84 (1999)
Shacham, A., Bergman, K., Carloni, L.P.: Photonic networks-on-chip for future generations of chip multiprocessors. IEEE Trans. Comput. 57(9), 1246–1260 (2008)
Vantrease, D., et al.: Corona: system implications of emerging nanophotonic technology. In: Proceedings of the 35th International Symposium on Computer Architecture, pp. 153–164 (2008)
Hendry, G., et al.: Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing. In: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, pp. 1–12 (2010)
Koyanagi, M., et al.: Three-dimensional integration technology and integrated systems. In: Proceedings of the Asia and South Pacific Design Automation Conference, pp. 409–415 (2009)
Poon, A.W., et al.: Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip. In: Proceedings of the SPIE International Society for Optical Engineering (2008)
Barwicz, T., et al.: Silicon photonics for compact, energy-efficient interconnects. J. Opt. Netw. 6(1), 63–73 (2007)
Rosenfeld, P.: Performance evaluation of the hybrid memory cube. Dissertation of the University of Maryland (2014)
Chan, J., et al.: Phoenixsim: a simulator for physical-layer analysis of chip-scale photonic interconnection networks. In: Proceedings on Design, Automation and Test in Europe (2010)
Kahng, A.B., et al.: Orion 2.0: a fast and accurate NoC power and area model for early-stage design space exploration. In: Proceedings on Design, Automation and Test in Europe (2009)
Miller, J.E., et al.: Graphite: a distributed parallel simulator for multicores. In: 16th IEEE Symposium on High-Performance Computer Architecture, January 2010
Acknowledgement
This research is supported by the grants from National Natural Science Foundation of China (Grant No. 61402502). Also, NSF 61402497 and 61472432 of China support our research.
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Feng, Q., Peng, C., Ren, S., Zhou, H., Deng, R. (2018). A High Throughput Power-Efficient Optical Memory Subsystem for Kilo-Core Processor. In: Xu, W., Xiao, L., Li, J., Zhang, C., Zhu, Z. (eds) Computer Engineering and Technology. NCCET 2017. Communications in Computer and Information Science, vol 600. Springer, Singapore. https://doi.org/10.1007/978-981-10-7844-6_6
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DOI: https://doi.org/10.1007/978-981-10-7844-6_6
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