Abstract
The source and drain engineering on dual-metal dual-gate (DMDG)-based 50 nm SOI MOSFET for various high-k gate oxides has been investigated in this work to improve its electrical performance. The proposed structure is designed by modifying source and drain (MSMD) side, and its performance is evaluated on ATLAS device simulator. The effect of this heterogeneous doping on source and drain side of the DMDG transistor led to the reduction of leakage current, decreases DIBL effectively, and improves ION current, thereby enabling the proposed device appropriate for low-power digital applications.
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Yadav, H., Chauhan, R.K. (2018). Performance Scrutiny of Source and Drain-Engineered Dual-Material Double-Gate (DMDG) SOI MOSFET with Various High-K. In: Bhateja, V., Coello Coello, C., Satapathy, S., Pattnaik, P. (eds) Intelligent Engineering Informatics. Advances in Intelligent Systems and Computing, vol 695. Springer, Singapore. https://doi.org/10.1007/978-981-10-7566-7_53
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DOI: https://doi.org/10.1007/978-981-10-7566-7_53
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