Abstract
The development of modern radar signal processing technology put forward higher requirements for processor performance. However, Moore’s law encounters bottlenecks, the computational performance of general-purpose processors is constrained and can not meet application requirements. The high-performance and low-power features of FPGA make them recently become of interest in research as a heterogeneous computing platform together with CPU. Pulse compression algorithm is widely used in the field of radar signal processing, which contains a large number of floating-point computing, the processing effect largely depends on the performance of the processor. Based on Open Computing Language (OpenCL), we first evaluated the Fast Fourier Transform (FFT) of various sample sizes on Arria10 FPGA board and FPGA achieve up to 33.5 times the performance improvement compared to DSP C6678 on processing different sample size of FFT. Then we realize a 4 K × 8 K size pulse compression processing using kernel channel. The results show that the core computation implemented on Arria10 FPGA through OpenCL is approximately 10x faster than DSP C6678 for 4 K × 8 K size pulse compression processing.
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Chen, D., Singh, D.: Fractal video compression in OpenCL: an evaluation of CPUs, GPUs, and FPGAs as acceleration platforms. In: Design Automation Conference. IEEE, pp. 297–304 (2013)
Chen, D., Singh, D.: Invited paper: using OpenCL to evaluate the efficiency of CPUS, GPUS and FPGAS for information filtering. In: International Conference on Field Programmable Logic and Applications. IEEE, pp. 5–12 (2012)
Ibrahim, M., Khan, O.: Performance analysis of fast fourier transform on field programmable gate arrays and graphic cards. In: International Conference on Computing, Electronic and Electrical Engineering. IEEE, pp. 158–162 (2016)
Jacquin, A.E.: Image coding based on a fractal theory of iterated contractive image transformations. IEEE Trans. Image Process. 1(1), 18–30 (1992)
Ayat, S.O., Khalil-Hani, M., Bakhteri, R.: OpenCL-based hardware-software co-design methodology for image processing implementation on heterogeneous FPGA platform. In: IEEE International Conference on Control System, Computing and Engineering. IEEE, pp. 36–41 (2016)
Muslim, F., Liang, M., Roozmeh, M., et al.: Efficient FPGA implementation of OpenCL High-Performance Computing applications via High-Level Synthesis. IEEE Access 5, 2747–2762 (2017)
Waidyasooriya, H.M., Takei, Y., Tatsumi, S., et al.: OpenCL-Based FPGA-Platform for stencil computation and its optimization methodology. IEEE Trans. Parallel and Distrib. Syst. 28(5), 1390–1402 (2017)
Arcas-Abella, O., Ndu, G., Sonmez, N., et al.: An empirical evaluation of high-level synthesis languages and tools for database acceleration. In: International Conference on Field Programmable Logic and Applications. IEEE, pp. 1–8 (2015)
Waidyasooriya, H.M., Hariyama, M.: FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL. In: IEEE International Conference on Computer and Information Science. IEEE, pp. 1–6 (2016)
Hill, K., Craciun, S., George, A., et al.: Comparative analysis of OpenCL vs. HDL with image-processing kernels on Stratix-V FPGA. In: International Conference on Application-Specific Systems, Architectures and Processors. IEEE, pp. 189–193 (2015)
Firmansyah, I., Yamaguchi, Y., Boku, T.: Performance evaluation of Stratix V DE5-Net FPGA board for high performance computing. In: International Conference on Computer, Control, Informatics and its Applications. IEEE (2017)
Acknowledgments
This work was supported in part by the Chang Jiang Scholars Program under Grant T2012122, in part by the Hundred Leading Talent Project of Beijing Science and Technology under Grant Z141101001514005.
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Yu, J., Li, X., Hu, S., Wang, Y. (2018). Realization and Optimization of Pulse Compression Algorithm on OpenCL-Based FPGA Heterogeneous Computing Platform. In: Sun, S., Chen, N., Tian, T. (eds) Signal and Information Processing, Networking and Computers. ICSINC 2017. Lecture Notes in Electrical Engineering, vol 473. Springer, Singapore. https://doi.org/10.1007/978-981-10-7521-6_18
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DOI: https://doi.org/10.1007/978-981-10-7521-6_18
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