Abstract
An area efficient implementation of the warped filter using variable high-pass, low-pass, band-stop and band-pass responses is proposed in this research work. A warped filter is achieved by placing an all-pass filter in the place of unit delay in the configuration of the digital filter. A variable high-pass or low-pass configuration is obtained using first-order transformation of the all-pass filter. However, the band-stop and band-pass variable filters are achieved by all-pass configuration of second order. A technique of coefficient decimation is used in the warped filter to overcome this issue. In order to make this design area efficient, a comparative analysis among the various adders and multipliers is performed. The most efficient adder and multiplier are incorporated in the filter design. The comparative analysis for the different adder and multiplier disposition is performed in the Cadence environment using the RC tool. The coding style used for this implementation is Verilog Hardware Description Language (HDL). The area utilization is reduced by 22% by implementing the new design of the warped filter.
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Golwelker, K., Kumari, R., Vigneswaran, T. (2018). An Area Efficient Design of Warped Filters. In: Li, J., Sankar, A., Beulet, P. (eds) VLSI Design: Circuits, Systems and Applications . Lecture Notes in Electrical Engineering, vol 469. Springer, Singapore. https://doi.org/10.1007/978-981-10-7251-2_21
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DOI: https://doi.org/10.1007/978-981-10-7251-2_21
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