Abstract
The property of redundant binary (RB) representation provides carry free addition, however the result from the addition operations are obtained in RB form. Thus, conversion from redundant binary to conventional binary (CB) representation is required at the output stage of operation. In this article, we have proposed an efficient conversion circuit that obtains CB from RB representation. The proposed RB to CB converter circuits are coded in Verilog Hardware Description Language (HDL) and synthesized in ASIC level using Encounter(R) RTL Compiler RC13.10 v13.10-s006_1 of Cadence tool. For 32 operand, the synthesis report for the proposed one bit RB to CB converter shows 4.1% and 16.8% improvement in speed as compared to CLA in FPGA and ASIC platform respectively.
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Tripathy, S.S., Barik, R.K., Pradhan, M. (2017). An Improved Conversion Circuit for Redundant Binary to Conventional Binary Representation. In: Mandal, J., Dutta, P., Mukhopadhyay, S. (eds) Computational Intelligence, Communications, and Business Analytics. CICBA 2017. Communications in Computer and Information Science, vol 775. Springer, Singapore. https://doi.org/10.1007/978-981-10-6427-2_29
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DOI: https://doi.org/10.1007/978-981-10-6427-2_29
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