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Intelligent Communication, Control and Devices pp 187–195Cite as

FPGA Implementation of High Speed Multiplier with Optimized Reduction Phase

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Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 624))

Abstract

Multipliers play an important role in DSP applications hence, the delay executed by them is a dominating factor. Various multiplication algorithms are used to enhance the speed of the device. All these multipliers are then compared based on look up table (LUTs) and path delays. The simulated results show that the Wallace tree multiplier is the fastest multiplier, and by using carry look-ahead adder (CLA) for addition, delay is further reduced.

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References

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Graphic Era University, Dehradun, 248002, India

    Arpita Singh & Priyanka Kumari

  2. Department of Electronics and Communication Engineering, Graphic Era Hill University, Dehradun, 248002, India

    Abhay Sharma

Authors
  1. Arpita Singh
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  2. Abhay Sharma
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  3. Priyanka Kumari
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Corresponding author

Correspondence to Arpita Singh .

Editor information

Editors and Affiliations

  1. Institute of Robotics Technology (R&D), University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India

    Rajesh Singh

  2. Department of Electronics & Instrumentation Engineering, University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India

    Sushabhan Choudhury

  3. Department of Electronics & Instrumentation Engineering, University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India

    Anita Gehlot

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© 2018 Springer Nature Singapore Pte Ltd.

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Singh, A., Sharma, A., Kumari, P. (2018). FPGA Implementation of High Speed Multiplier with Optimized Reduction Phase. In: Singh, R., Choudhury, S., Gehlot, A. (eds) Intelligent Communication, Control and Devices. Advances in Intelligent Systems and Computing, vol 624. Springer, Singapore. https://doi.org/10.1007/978-981-10-5903-2_21

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  • DOI: https://doi.org/10.1007/978-981-10-5903-2_21

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-5902-5

  • Online ISBN: 978-981-10-5903-2

  • eBook Packages: EngineeringEngineering (R0)

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