Companding-Based Technique to Improve Signal to Noise Ratio and Power Dissipation in Analog to Digital Convertor Operating at CTDSP
Continuous-time digital signal processing form supports for study and investigation of parameters involved in the analog to digital conversion. The parameters to be improvised are particularly signal to noise ratio and power dissipation. Analog to digital convertors are the backbone of digital world, hence, there is a need to look up on discoveries and researches for the best possible results. With this in consideration, this paper presents a technique to improve the above-mentioned parameters. A 1000 Hz window has been considered for the outcomes of PD. The methodology involves the comparison of SNR and PD in quantization and companding. An in-depth analysis was performed, both forms of uniform quantization were considered which are mid-tread and mid-rise, same is the case with companding as well, A-Law and µ-Law companding techniques were taken into account and best possible results were obtained. Validation was done by accessing and optimizing the outcomes present till date.
KeywordsAnalog to digital convertor Quantization Companding
The authors express their gratitude to Mr. Gagan Minocha currently working at Mentor Graphics, Noida (U.P.), for his guidance and support.
- 1.Y. Tsividis, “Continuous-time digital signal processing”, El. Letters, vol. 39, no. 21, pp. 1551–1552, 16 Oct. 2003.Google Scholar
- 2.Y. Tsividis, “Digital signal processing in continuous time: a possibility for avoiding aliasing and reducing quantization error”, Proc. 2004 IEEE Int. Conf. Acoustics, Speech, and Sig. Proc., vol. II, pp. 589–592.Google Scholar
- 3.Y. Tsividis, “Event-Driven, Continuous-time ADCs and DSPs for Adapting Power Dissipation to Signal Activity”, Proc. 2010 IEEE Int. Symp. Circuits Syst., Paris, in press.Google Scholar
- 4.C. Vezyrtzis and Y. Tsividis, “Processing of signals using level crossing sampling”, Proc. 2009 Int. Symp. Circ. Syst., pp. 2293–2296.Google Scholar
- 5.B. Schell and Y. Tsividis, “A continuous-time ADC/DSP/DAC system with no clock and activity-dependent power dissipation”, IEEE J. Solid-State Circ., vol. 43, pp. 2472–2481, Nov. 2008.Google Scholar