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Silicon–Germanium Channel Heterostructure p-MOSFETs

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Proceedings of the International Conference on Microelectronics, Computing & Communication Systems

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 453))

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Abstract

In this paper, we study the heterostructure p-MOSFETs with Silicon–Germanium channel. This chapter deals with the hole confinement in the SiGe well and the design trade-off for Si1−x Ge x p-channel MOSFET devices. Also the selection of gate electrode, optimization of SiGe channel width and profile, Si cap and gate oxide thicknesses and the method of threshold voltage adjustment have been addressed.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, 751030, Odisha, India

    Tara Prasanna Dash, Sanghamitra Das & Rajib K. Nanda

Authors
  1. Tara Prasanna Dash
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  2. Sanghamitra Das
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  3. Rajib K. Nanda
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Corresponding author

Correspondence to Tara Prasanna Dash .

Editor information

Editors and Affiliations

  1. Department of Electronics & Communicatio, Birla Institute of Technology, Mesra, Ranchi, Jharkhand, India

    Vijay Nath

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Dash, T.P., Das, S., Nanda, R.K. (2018). Silicon–Germanium Channel Heterostructure p-MOSFETs. In: Nath, V. (eds) Proceedings of the International Conference on Microelectronics, Computing & Communication Systems. Lecture Notes in Electrical Engineering, vol 453. Springer, Singapore. https://doi.org/10.1007/978-981-10-5565-2_32

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  • DOI: https://doi.org/10.1007/978-981-10-5565-2_32

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-5564-5

  • Online ISBN: 978-981-10-5565-2

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