Abstract
This paper is proposed to design an ultra-low-power CMOS class E power amplifier circuit to analyze its power gain and output power in periodic steady state (PSS) response. A technique is presented to facilitate the control power of the class E power amplifier (radio frequency power amplifier). The basic circuit of RF PA is designed which has different switching actions as different values of capacitors are taken into account. A driver F stage has been added in the basic circuit which increases the switching action considerably. When the voltage becomes high, the current decreases and when the voltage decreases, the current becomes high. Therefore, by using above technique, the power consumption is minimized upto great extend. The efficiency of power amplifier obtained is 78% and power gain is 60 dB.
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Acknowledgements
We are thankful to Department of Electronics and Communication, BIT, Mesra, India for kind cooperation. We are also thankful to Vice Chancellor Dr. M. K. Mishra and head of department Dr. V. Gupta for encouragement and support. We are also thankful to Principal, PES Institute of Technology Dr. K. S. Sridhar and Head of Department, Electronics and communication, PES Institute of Technology Dr. T. S Chander for providing us with suitable resources.
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Singh, J. et al. (2018). Design of Ultra-Low-Power CMOS Class E Power Amplifier. In: Nath, V. (eds) Proceedings of the International Conference on Microelectronics, Computing & Communication Systems. Lecture Notes in Electrical Engineering, vol 453. Springer, Singapore. https://doi.org/10.1007/978-981-10-5565-2_28
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DOI: https://doi.org/10.1007/978-981-10-5565-2_28
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