Abstract
This paper presents detailed over view of four different novel memristor-based nano-crossbar structures that are employed for designing a Non-Volatile Look-Up Table (NVLUT) of a Field Programmable Gate Array (FPGA) with particular focus on efficient READ and WRITE operations; techniques to overcome the effect sneak path current on unselected memristors. Cross-point memory array structure, MOS accessed memory array structure, Memory array structure with transistors at BL and Columns isolated memory array structure are the different structures considered in this paper. The paper analyzes in detail about the LUT structures and their WRITE and READ operations. Also the analysis on the SPICE simulation results of the READ and WRITE delay, energy dissipation and energy delay product of four LUT structures are presented. Among the LUT structures, Columns isolated memory array structure seems to be potential candidate for NVLUT as it eliminates the effect of sneak path current on the unselected memristors. Also it showed a fast WRITE time, significantly reduced READ power dissipation and no power dissipation in the stand-by mode. In addition, it eliminates the write half-select issue. Moreover, it prevents the data integrity when compared with other structures as this structure has better controllability of the NSPs for the unselected memristors.
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Acknowledgements
This work is based on the contributions from Prof. Fabrizio Lombardi, Northeastern University, Boston USA and Prof. Haider Abbas, The University of Nottingham, Malaysia.
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Nandha Kumar, T. (2017). An Overview on Memristor-Based Non-volatile LUT of an FPGA. In: Prabaharan, S., Thalmann, N., Kanchana Bhaaskaran, V. (eds) Frontiers in Electronic Technologies. Lecture Notes in Electrical Engineering, vol 433. Springer, Singapore. https://doi.org/10.1007/978-981-10-4235-5_8
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