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Performance Evaluation of Flash ADCs in Presence of Offsets Using Hot Code Generator and Bit Swap Logic (BSL)

  • Pranati GhoshalEmail author
  • Sunit Kumar Sen
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 11)

Abstract

Performance of flash ADCs is beset in presence of offsets in comparators. Offsets present in comparators of a flash ADC give rise to bubble or sparkle error. There are several methods to eliminate this error—both first order or higher ones. In this paper, performance evaluation of flash ADCs will be carried out using hot code generator and bit swap logic (BSL) in presence of such offsets. It is well known that while hot code generators can take care of only first-order error in the thermometric code, BSL method can take care of any order of error. Simulation for a 3-bit flash ADC has been carried out in the presence of offsets and it has been shown that while the hot code generator can get rid of only first-order error, the BSL method overcomes any order of error.

Keywords

Flash ADCs Bit swap logic Hot code generator Comparator offset 

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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  1. 1.Techno IndiaKolkataIndia
  2. 2.University of CalcuttaKolkataIndia

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