Aspects of Low-Power High-Speed CMOS VLSI Design: A Review

  • Prolay GhoshEmail author
  • Tanusree Saha
  • Barsha Kumari
Conference paper
Part of the Lecture Notes in Networks and Systems book series (LNNS, volume 11)


VLSI and nanocomputing has become the most desirable feature of any integrated chip. Computers are also becoming more portable. ICs are being introduced everywhere. This huge implementation of IC has also opened a scope of research. Size of IC has become an issue to think about. Power dissipation is also another important consideration as performance of VLSI chip design. Low-power high-speed CMOS circuit design methodologies will be elaborated in this paper.


Power dissipation Threshold voltage Leakage current Propagation delay VTCMOS MTCMOS 


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© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  1. 1.Department of Information TechnologyJIS College of EngineeringKalyaniIndia

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