Performance Analysis and Implementation of Highly Reconfigurable Modified SDM-Based NoC for MPSoC Platform on Spartan6 FPGA

  • Y. Amar Babu
  • G. M. V. Prasad
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 518)


To meet today’s demanding requirements such as low power consumption and high performance while maintaining flexibility and scalability, system-on-chip will integrate several number of processor cores and other IPs with network-on-chip. To implement NoC-based MPSoC on an FPGA, NoCs should provide guaranteed services and be run-time-reconfigurable. Current TDM- and SDM-based NoCs take more area and would not support run-time reconfiguration. This paper presents modified spatial division multiplexing-based NoC on FPGA; in this we have modified complex network interface and proposed flexible network interface and efficient SDM-based NoC. This proposed architecture explored feasibility of connection requirements dynamically from soft cores during run-time.


NoC SDM VHDL code Microblazes 


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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  1. 1.LBR College of EngineeringMylavaramIndia
  2. 2.B.V.C Institute of Technology & ScienceBatlapalemIndia

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