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Real-Time Power and Performance-Aware System

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Abstract

Due to the rapid growth in computing industry, demand for faster and better computing units have been increasing exponentially. Because of this fact, designer are more focused on multiprocessor with higher resources. These techniques of improving power have proved to be very efficient. However, there are few issue of high power consumption, heat dissipation, and inefficient resource utilization associated with high end processors. Therefore, there is need for processor smart enough to conserve energy by efficiently utilizing the resources. This chapter presents a fuzzy logic based real time processor which can save power upto 40 % without compromising the performance. Model is discussed for both INTEL and Leon3 architecture.

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References

  1. Rakesh Kumar, Keith I Farkas, Norman P Jouppi, Parthasarathy Ranganathan, and Dean M Tullsen. Single-isa heterogeneous multi-core architectures: The potential for processor power reduction. In Microarchitecture, 2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM International Symposium on, pages 81–92. IEEE, 2003.

    Google Scholar 

  2. Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, and Adriana Gonzalez. Understanding the thermal implications of multi-core architectures. Parallel and Distributed Systems, IEEE Transactions on, 18(8):1055–1065, 2007.

    Article  Google Scholar 

  3. Muhammad Yasir Qadri, Klaus D McDonald Maier, and Nadia N Qadri. Energy and throughput aware fuzzy logic based reconfiguration for mpsocs. Journal of Intelligent and Fuzzy Systems, 26(1):101–113, 2014.

    Google Scholar 

  4. Sonal Saha and Binoy Ravindran. An experimental evaluation of real-time dvfs scheduling algorithms. In Proceedings of the 5th Annual International Systems and Storage Conference, page 7. ACM, 2012.

    Google Scholar 

  5. Chung-hsing Hsu and Wu-chun Feng. A power-aware run-time system for high-performance computing. In Proceedings of the 2005 ACM/IEEE conference on Supercomputing, page 1. IEEE Computer Society, 2005.

    Google Scholar 

  6. Yuki Abe, Hiroshi Sasaki, Martin Peres, Koji Inoue, Kazuaki Murakami, and Shinpei Kato. Power and performance analysis of gpu-accelerated systems. In Presented as part of the 2012 Workshop on Power-Aware Computing and Systems, 2012.

    Google Scholar 

  7. Dongsheng Ma and Rajdeep Bondade. Enabling power-efficient dvfs operations on silicon. Circuits and Systems Magazine, IEEE, 10(1):14–30, 2010.

    Article  Google Scholar 

  8. Jacob Leverich, Matteo Monchiero, Vanish Talwar, Parthasarathy Ranganathan, and Christos Kozyrakis. Power management of datacenter workloads using per-core power gating. Computer Architecture Letters, 8(2):48–51, 2009.

    Article  Google Scholar 

  9. Jungseob Lee and Nam Sung Kim. Optimizing throughput of power-and thermal-constrained multicore processors using dvfs and per-core power-gating. In Design Automation Conference, 2009. DAC’09. 46th ACM/IEEE, pages 47–50. IEEE, 2009.

    Google Scholar 

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Correspondence to Jameel Ahmed .

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Ahmed, J., Siyal, M.Y., Najam, S., Najam, Z. (2017). Real-Time Power and Performance-Aware System. In: Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System. SpringerBriefs in Applied Sciences and Technology(). Springer, Singapore. https://doi.org/10.1007/978-981-10-3120-5_4

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  • DOI: https://doi.org/10.1007/978-981-10-3120-5_4

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-3119-9

  • Online ISBN: 978-981-10-3120-5

  • eBook Packages: EngineeringEngineering (R0)

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