Abstract
Increasing demand for high performance has shifted the focus of the designers from single processor to multiprocessor and parallel processing. Another important technique to increase the performance of the overall system is increasing cache memory. Both these techniques play vital role in performance and power consumption. This chapter presents the available type of processors, types of multiprocessors along with the working and protocols of cache memory.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Gabor Madl, Sherif Abdelwahed, and Douglas C Schmidt. Verifying distributed real-time properties of embedded systems via graph transformations and model checking. Real-Time Systems, 33(1–3):77–100, 2006.
Geoffrey Blake, Ronald G Dreslinski, and Trevor Mudge. A survey of multicore processors. Signal Processing Magazine, IEEE, 26(6):26–37, 2009.
William Stallings. Computer organization and architecture: designing for performance. Pearson Education India, 2000.
Krste Asanovic, Ras Bodik, Bryan Christopher Catanzaro, Joseph James Gebis, Parry Husbands, Kurt Keutzer, David A Patterson, William Lester Plishker, John Shalf, Samuel Webb Williams, et al. The landscape of parallel computing research: A view from berkeley. Technical report, Technical Report UCB/EECS-2006-183, EECS Department, University of California, Berkeley, 2006.
Jamil Chaoui, Ken Cyr, Sébastien de Gregorio, J-P Giacalone, Jennifer Webb, and Yves Masse. Open multimedia application platform: enabling multimedia applications in third generation wireless terminals through a combined risc/dsp architecture. In Acoustics, Speech, and Signal Processing, 2001. Proceedings.(ICASSP’01). 2001 IEEE International Conference on, volume 2, pages 1009–1012. IEEE, 2001.
John L Hennessy and David A Patterson. Computer architecture: a quantitative approach. Elsevier, 2012.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2017 The Author(s)
About this chapter
Cite this chapter
Ahmed, J., Siyal, M.Y., Najam, S., Najam, Z. (2017). Multiprocessors and Cache Memory. In: Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System. SpringerBriefs in Applied Sciences and Technology(). Springer, Singapore. https://doi.org/10.1007/978-981-10-3120-5_1
Download citation
DOI: https://doi.org/10.1007/978-981-10-3120-5_1
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-10-3119-9
Online ISBN: 978-981-10-3120-5
eBook Packages: EngineeringEngineering (R0)