RiCoBiT—Ring Connected Binary Tree: A Structured and Scalable Architecture for Network-on-Chip Based Systems: an Exclusive Summary

Abstract

High-performance computing systems consist of many modules of high complexity with billion transistors on a small silicon die. To design these mega functional systems, the common bus architecture poses a serious problem in terms of latency and throughput. To overcome the disadvantages of the common bus architecture, a new paradigm in ASIC design called the Network-on-Chip (NoC) was proposed. Several topologies like 2D mesh, torus, etc., were used to interconnect the different modules of the design using this novel idea. These topologies underperformed when scaled. This paper proposes a new architecture RiCoBiT: Ring Connected Binary Tree. It is a new scalable, structured architecture for Network-on-Chip based systems. An optimal routing algorithm for it has been designed. The paper discusses the different properties and performance parameters like maximum hop count, average hop count, number of wire segments, and wire length used to interconnect the nodes of RiCoBiT. These parameters are compared with that of 2D mesh and torus. The paper also discusses and bounds real-time parameters like latency and throughput.