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Ferroelectric-Gate Field Effect Transistor Memories pp 187–201Cite as

P(VDF-TeFE)/Organic Semiconductor Structure Ferroelectric-Gate FETs

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Part of the book series: Topics in Applied Physics ((TAP,volume 131))

Abstract

Organic ferroelectric-gate field-effect transistor (FET) memories were fabricated using pentacene and rubrene thin films as the semiconductors and a poly(vinylidene fluoride-tetrafluoroethylene) [P(VDF-TeFE)] thin film as the ferroelectric gate. The P(VDF-TeFE) film was prepared by spin coating and annealing at 170 °C for 2.5 h, and the pentacene was prepared by vacuum evaporation. In contrast, the rubrene thin film sheet was grown by physical vapor transport and placed onto a spin-coated P(VDF-TeFE) thin film layer. The polarization-electric field hysteresis of the P(VDF-TeFE) thin film was observed, and the obtained remanent polarization of 3.9 μC/cm2 was sufficient for controlling the surface potential of pentacene or rubrene. A hysteresis loop was clearly observed in the drain current-gate voltage behavior of the ferroelectric-gate FET. In the case of the ferroelectric-gate FET with P(VDF-TeFE)/pentacene, the ON/OFF ratio of drain current was 830, and the carrier mobility was 0.11 cm2/Vs. On the other hand, the maximum drain current of the FET with P(VDF-TeFE)/rubrene was 1.6 × 10−6 A, which is about two orders of magnitude larger than that of the P(VDF-TeFE)-gate FET using the pentacene thin film. The mobility of the organic ferroelectric-gate FET using the rubrene thin film was 0.71 cm2/Vs, which is 6.5 times larger than that of the FET with pentacene thin film.

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Authors and Affiliations

  1. Graduate School of Engineering Science, Osaka University, Machikaneyama 1-3, Toyonaka, Osaka, 560-8531, Japan

    Takeshi Kanashima

  2. Institute for NanoScience Design, Osaka University, Machikaneyama 1-3, Toyonaka, Osaka, 560-8531, Japan

    Masanori Okuyama

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  1. Takeshi Kanashima
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  2. Masanori Okuyama
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Correspondence to Takeshi Kanashima .

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Editors and Affiliations

  1. Electrical and Computer Engineering, University of Seoul Electrical and Computer Engineering, Seoul, Korea (Republic of)

    Byung-Eun Park

  2. Frontier Collaborative Research Cen, Tokyo Institute of Technology Frontier Collaborative Research Cen, Yokohama, Japan

    Hiroshi Ishiwara

  3. Graduate School of Engineering Scie, Osaka University Graduate School of Engineering Scie, Osaka, Japan

    Masanori Okuyama

  4. National Institute of Advanced Industrial Science&Tech (AIST), Tsukuba, Japan

    Shigeki Sakai

  5. Advanced Materials Engineering for Information & Electronics, Kyunghee University, Yongin, Korea (Republic of)

    Sung-Min Yoon

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Kanashima, T., Okuyama, M. (2016). P(VDF-TeFE)/Organic Semiconductor Structure Ferroelectric-Gate FETs. In: Park, BE., Ishiwara, H., Okuyama, M., Sakai, S., Yoon, SM. (eds) Ferroelectric-Gate Field Effect Transistor Memories. Topics in Applied Physics, vol 131. Springer, Dordrecht. https://doi.org/10.1007/978-94-024-0841-6_9

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  • DOI: https://doi.org/10.1007/978-94-024-0841-6_9

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