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E-R-D Optimization in Video Compression

Chapter
Part of the KAIST Research Series book series (KAISTRS)

Abstract

In mobile multimedia devices with video compression capability, a reduction of the power consumption in H.264/AVC compression is important to increase battery lifetime. This chapter presents a power-aware design to determine the best combination of operation conditions for multiple power-scaling schemes. To derive the best combination of existing power-scaling schemes, the power saving and rate-distortion (R-D) performances of individual schemes are presented. The combined effects of these schemes on power saving and R-D loss are modeled and the best operation combination is derived. The largest power saving can be achieved with the smallest R-D degradation by selecting an optimized combination from among all possible combinations. The optimized combinations are defined as a power level table comprising ten levels. Depending on the size and motion speed of a video, four different power level tables are designed to achieve performance improvements. For application of such tables to the encoder, the usable power for each period is calculated and the power level suitable for the calculated power budget is selected. This application method uses the given power budget as much as possible and shows a better performance. The presented power level tables are suitable for power control in real-time applications because the tables are developed in advance. The presented power-aware design is tested with four popular power-saving schemes and simulations with these four schemes show that a power saving of about 30 % is achieved for slow-motion videos, whereas these amounts are about 20 % for fast-motion videos at the sacrifice of less than 0.1 dB Bjontegaard Delta PSNR degradation.

Keywords

H.264/AVC Power-aware design Power estimation model Power reduction Power-scaling scheme Real-time application 

Notes

Acknowledgments

This work is supported by the Center for Integrated Smart Sensors funded by the Ministry of Science, ICT and Future Planning as the Global Frontier Project.

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Copyright information

© Springer Science+Business Media Dordrecht 2016

Authors and Affiliations

  1. 1.Department of Electrical and Computer Engineering, Inter-University Semiconductor Research CenterSeoul National UniversitySeoulKorea
  2. 2.School of Information and Communication EngineeringInha UniversityIncheonKorea

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