Abstract
This chapter explains TSV noise coupling, which is one of the significant problems in TSV-based 3DIC. TSV shows frequency-dependent noise coupling characteristics, which can be analyzed based on the TSV and silicon substrate models. The noise coupling from TSV to TSVs and transistors is severe and coupling reduction methods are essential to satisfy very tight noise tolerance budget of current high performance 3DIC; control TSV design parameters and TSV array formation, optimize TSV termination scheme, as well as design shielding structures inside TSV array using high doped guard rings, shielding TSV, shielding bump. These methods are compared by showing shielding effectiveness, design restriction, consuming area, and manufacturing process compatibility and the several design guides are provided for choosing the adequate and best way among TSV noise coupling reduction methods considering real products.
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Cho, J., Pak, J.S., Kim, J. (2014). Noise Coupling and Shielding in 3D ICs. In: Lee, M., Pak, J., Kim, J. (eds) Electrical Design of Through Silicon Via. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-9038-3_4
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DOI: https://doi.org/10.1007/978-94-017-9038-3_4
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