Planarization System Structure

  • V. Feinberg
  • A. Levin
  • E. Rabinovich
Part of the Mathematics and Its Applications book series (MAIA, volume 399)

Abstract

The implementation of the research described in previous chapters is discussed in the present chapter devoted to a real system for synthesizing a plane embedding of a circuit which makes part of a VLSI CAD system. According to the purpose and functions of the system, possible solutions of the main problems of system design are suggested: the contents and interaction of the system program base and data organization.

Keywords

Planarization System Hierarchical Model Layout Optimization VLSI Circuit Location Location 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1997

Authors and Affiliations

  • V. Feinberg
    • 1
  • A. Levin
    • 2
  • E. Rabinovich
    • 3
  1. 1.SILVACO InternationalSanta ClaraUSA
  2. 2.Intel CorporationSanta ClaraUSA
  3. 3.GorizontMinskBelarus

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