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Introduction

  • V. Feinberg
  • A. Levin
  • E. Rabinovich
Part of the Mathematics and Its Applications book series (MAIA, volume 399)

Abstract

At the beginning we would like to introduce a refinement. The term ‘VLSI planarization’ means planarization of a circuit of VLSI, i.e. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tunnels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed.

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Copyright information

© Springer Science+Business Media Dordrecht 1997

Authors and Affiliations

  • V. Feinberg
    • 1
  • A. Levin
    • 2
  • E. Rabinovich
    • 3
  1. 1.SILVACO InternationalSanta ClaraUSA
  2. 2.Intel CorporationSanta ClaraUSA
  3. 3.GorizontMinskBelarus

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