Abstract
The test bench methodology helps the design engineer to structure the simulation of his circuit. As showed in this paper, the test bench methodology can further be developed in order to efficiently reuse simulation stimuli and response for the real device under test. As FPGAs are very often used to prototype an ASIC design, an easy switch between simulation and real hardware test is necessary to establish a rapid prototyping design and test environment. Our ProTest system closes the gap between the simulation and the test environment with an easy to use computer-aided-test test tool and low cost test machine.
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© 1998 Springer Science+Business Media Dordrecht
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Jacomet, M., Breitenstein, J., Wälti, R., Winzenried, L., Gysel, M. (1998). ProTest: A Low Cost Rapid Prototypig and Test System for PCB, ASIC and FPGA. In: Mouthaan, T.J., Salm, C. (eds) Microelectronics Education. Springer, Dordrecht. https://doi.org/10.1007/978-94-011-5110-8_38
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DOI: https://doi.org/10.1007/978-94-011-5110-8_38
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-010-6147-6
Online ISBN: 978-94-011-5110-8
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