Abstract
This work studies the influence of the back gate voltage on the LDD SOI nMOSFETs series resistance from 150 to 300 K. The MEDICI simulated results were used to support the analysis. It was observed that for low temperatures the influence of the back gate bias is higher. However, this influence becomes negligible when the back interface below the LDD region is inverted or if a retrograde profile for the LDD region is used.
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References
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© 2000 Springer Science+Business Media Dordrecht
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Nicolett, A.S., Martino, J.A., Simoen, E., Claeys, C. (2000). Back Gate Voltage Influence on the LDD SOI NMOSFET Series Resistance Extraction from 150 to 300 K. In: Hemment, P.L.F., Lysenko, V.S., Nazarov, A.N. (eds) Perspectives, Science and Technologies for Novel Silicon on Insulator Devices. NATO Science Series, vol 73. Springer, Dordrecht. https://doi.org/10.1007/978-94-011-4261-8_17
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DOI: https://doi.org/10.1007/978-94-011-4261-8_17
Publisher Name: Springer, Dordrecht
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