Abstract
In this chapter the development of a CMOS integrated circuit known as HANNIBAL (hardware architecture for neural networks implementing backpropagation algorithm learning) [1] is described. The chip can be used as a building block for efficiently implementing large neural networks. Although any network topology is allowed, it is intended for implementing MLPs. As its name implies, it allows training to be performed via the backpropagation algorithm. This chip does not provide explicit inter-neuron connections, but has its communication bandwidth tailored to match that of digital host systems with which networks are likely to communicate in envisaged applications.
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References
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© 1992 British Telecommunications plc
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Myers, D.J., Vincent, J.M., Orrey, D.A. (1992). A VLSI Architecture for Implementing Neural Networks with On-Chip Backpropagation Learning. In: Linggard, R., Myers, D.J., Nightingale, C. (eds) Neural Networks for Vision, Speech and Natural Language. BT Telecommunications Series, vol 1. Springer, Dordrecht. https://doi.org/10.1007/978-94-011-2360-0_20
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DOI: https://doi.org/10.1007/978-94-011-2360-0_20
Publisher Name: Springer, Dordrecht
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