Abstract
Optoelectronic, VHSIC, ASIC & USIC devices are key components critical to system reliability and when failure occurs correct diagnosis together with expedient remedial action is essential (in certain applications, for example military or aerospace, failure cannot be tolerated). Consequently with the advances in these technologies, together with the wide variety of packaging formats used, innovative tools and techniques for failure analysis need developing.
The information obtained from field performance and the failure mechanisms involved form an important part in the total quality cycle. It is important to relate field failure mechanisms with those generated by reliability evaluation assessments and hence establish the value of such assessments. The escalating costs of electrical and environmental evaluation equipment, analytical equipment and just maintaining expertise can be prohibitive.
Long gone are the days when the failure analysis laboratory was merely a support service aligned to either an equipment user or manufacturer or component manufacturer. This paper looks at the technical, commercial and quality issues facing the user of components and particularly the role of the failure analyst. Focus is given to the part played in determining failure costs, appraisal costs and prevention costs, all inherent in minimising whole life cycle costs. The need to interface effectively and promptly with respective parts of organisations from equipment users and manufacturers, component manufacturers and component designers is recognised.
The paper is written from the perspective of a user of the failure analyst’s services (viz the component evaluation engineer).
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References
R. G. Taylor and C. E. Stephens “Microcircuit Failure Analysis” British Telecommunications Engineering 4, April 1985, 39.
B. P. Richards and P. K. Fother “Failure Analysis of Semiconductor Devices — Rationale, Methodology, and Practice” GEC Journal of Research 1, No 2, 74.
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British Telecom audit of Motorola Toulouse (1988).
IBM presentation to JEDEC Solid State Products Engineering Council, Myrtle Beach, US, September 1988.
C. E. Stephens discussion paper “STACK Failure Analysis Working Party”, March 1989.
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© 1990 Kluwer Academic Publishers
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Taylor, R.G., Hughes, J.A. (1990). Failure Analysis: The Challenge. In: Christou, A., Unger, B.A. (eds) Semiconductor Device Reliability. NATO ASI Series, vol 175. Springer, Dordrecht. https://doi.org/10.1007/978-94-009-2482-6_10
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DOI: https://doi.org/10.1007/978-94-009-2482-6_10
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-010-7620-3
Online ISBN: 978-94-009-2482-6
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