Abstract
Absolute performance and price/performance of computing systems have advanced at an extremely rapid rate since the early 1950’s. The rapid decrease in the cost per operation has caused the computer industry’s designers to begin thinking of “computers as commodities”. High volume manufacturing and mass markets have even challenged mission-oriented government agencies to consider commercial off-the-shelf technology as the best path to ever higher performance at a reasonable cost. The reduction of printable line widths for integrated circuits has been primarily responsible for this trend. While the projected improvements in line width continue, there has been a decline in the rate of minimum feature improvement. Short of a revolutionary breakthrough, it is generally believed that only modest gains (relative to the historical trends) will come with higher gate and clock speeds alone. Rather, higher density active devices coupled with scalable architectures and three-dimensional packaging technologies will provide the new high performance solutions.
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© 1996 Kluwer Academic Publishers
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Nelson, S. (1996). Architectural Frontiers Enabled by High Connectivity Packaging. In: Luryi, S., Xu, J., Zaslavsky, A. (eds) Future Trends in Microelectronics. NATO ASI Series, vol 323. Springer, Dordrecht. https://doi.org/10.1007/978-94-009-1746-0_10
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DOI: https://doi.org/10.1007/978-94-009-1746-0_10
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