High Technology Manufacturing: Critical Issues for the Future

Abstract

The economy of fabrication integration has moved the semiconductor integrated circuit (IC) industry forward at an unparalleled pace. The steady move to greater integration of computational functions achieved by smaller minimum feature sizes and larger wafer and die sizes has characterized IC technology since its inception. Figure 1 details the increase in circuit complexity over the past ~ 25 years. For a large part of that time, circuit complexity doubled each year.1 The continual decrease in device dimension and increase in wafer size, have allowed a greater number of more sophisticated devices to be produced per wafer. The level of circuit integration has proceeded from “small scale integration” (SSI,~100 gates) to the threshold of “ultra-large scaleintegration” (ULSI, ~ 10⁹ gates). This has been influential in achieving the reduction of cost per “bit”, as shown in Figure 2. As in Figure 1, we note that the most recent data shows a leveling off of the rate of change of either reduction in device dimension or reduction in cost per bit. This levelling off reflects changes in and current constraints to device and processing technology, and suggests re-evaluation of “traditional” manufacturing strategies for continued economic viability in this area. Those traditional strategies have included extensive use of “batch processing” (simultaneous processing of large numbers of wafers), performed on increasingly sophisticated, disjoint equipment within extensive clean room facilities