Digital Neurocomputers Oriented to a VLSI -Realization

Abstract

The architecture of digital neurocomputers as the distributed systems with multilevel hierarchy satisfying modern countrains of a VLSI -technology are presented in this paper. A neurocomputer architecture is considered in terms of physical and functional structures. It’s shown that the use of a cubic interface allows to design the neurocomputer for simulation of neural networks of random configuration including fully connected neural structures with local circuits of information processing. The features of the development of digital neurocomputer with architecture of hypercubic type are presented here. The given approach will allow to extend the application of neurocomputers at the expense of functional possibilities of dentride circuits of a dynamic neuroprocessors.