Implementation of a VLSI Feedback Neural Network Chip with Internal Automatic Identification of Successful Prototype Retrieval

Abstract

Most neural networks, especially feedforward and feedback, do always produce an output for any input stimulation, the relevance of which is being assessed by the supervisor, who marks a succes in case of recognition or correct classification, and a failure if it is not the case. It is particuarly interesting, in view of multi-networks architectures, that any network may be made autonomous, capable of self-identification of success or failure.

We have devised a digital feedback network, including 64 binary neurons, capable of internal learning, and also having the capability of a rather crude but efficient annealing mechanism for improving the overall attractivity of the stored prototypes. We use a small part of each stored vectors for labeling purposes, the label being calculated by a classical cyclic error correcting code.

Whe show that, after relaxation, the coherence between the label field and the information field in the attractor (in the sense of the cyclic code) is a strong indication that this attractor is a learnt prototype, and is a spurious state in the opposite case. This identification may be as high as 98% accurate if the label field is long enough, for instance six bits for a total vector of 64 bits.

This feature, easily implemented in silicon, allows to envision various architectures involving the cooperation of several networks with different learnt patterns.