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Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications pp 99–129Cite as

Negative Bias Temperature Instability in (Si)Ge pMOSFETs

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Part of the book series: Springer Series in Advanced Microelectronics ((MICROELECTR.,volume 47))

Abstract

A comprehensive analysis of the NBTI reliability of SiGe channel pMOSFETs is reported in this chapter. First the impact of individual gate stack parameters on the device reliability is discussed. The experimental learning is then combined to propose a reliability-oriented gate stack optimization, which is shown to enable ultrathin EOT devices with sufficient reliability, i.e., 10 years of continuous operation at nominal V DD. The demonstrated results are shown to be process- and architecture-independent and as such, directly transferable to other device technologies such as pure Ge channel and wrapped SiGe channel finFETs. A detailed experimental analysis of the NBTI kinetics on SiGe channel devices is proposed and compared with Si channel reference devices. The interplay between NBTI and Body Biasing on Si and SiGe devices is discussed, showing that it can yield further benefit for the novel technology. A model capable of explaining all the experimental observations is proposed. Finally, some considerations about the correlation of device performance and reliability are made.

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Authors and Affiliations

  1. IMEC, Leuven, Belgium

    Jacopo Franco, Ben Kaczer & Guido Groeseneken

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  1. Jacopo Franco
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  2. Ben Kaczer
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  3. Guido Groeseneken
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Correspondence to Jacopo Franco .

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Franco, J., Kaczer, B., Groeseneken, G. (2014). Negative Bias Temperature Instability in (Si)Ge pMOSFETs. In: Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications. Springer Series in Advanced Microelectronics, vol 47. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-7663-0_4

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  • DOI: https://doi.org/10.1007/978-94-007-7663-0_4

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  • Online ISBN: 978-94-007-7663-0

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