Abstract
The circuits can be very sensitive to process variability, but different circuits can have different sensibilities. To have representative results, the circuits that will be fabricated to be tested must be carefully chosen. First, the sensitivity of the logic circuits will be verified through simulation in 130 and 90 nm technologies, however only the results for 90 nm will be shown in this chapter. Using MC simulations, the sensitivity of inverters (representing generic combinational circuits) and FFs will be measured. Combining them, we will verify if hold time violations are a potential problem, and if they can be generated by process variations. Finally, the circuits chosen for fabrication and measurement in silicon will be shown.
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References
GEROSA, G. et al. A 2.2W, 80 MHz Superscalar RISC Microprocessor. IEEE Journal of Solid-State Circuits, New York, v. 29, n. 12, p. 1440–1454, Dec. 1994.
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© 2014 Springer Science+Business Media Dordrecht
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Neuberger, G., Wirth, G., Reis, R. (2014). Circuits Under Test. In: Protecting Chips Against Hold Time Violations Due to Variability. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-2427-3_4
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DOI: https://doi.org/10.1007/978-94-007-2427-3_4
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Print ISBN: 978-94-007-2426-6
Online ISBN: 978-94-007-2427-3
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