Abstract
With the development of Very-Deep Sub-Micron (VDSM) technologies, process variability is becoming increasingly important and is a very important issue in the design of complex circuits. Process variability is the statistical variation of process parameters, meaning that these parameters do not have always the same value, but become a random variable, with a given mean value and standard deviation. This effect can lead to several issues in digital circuit design.
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Neuberger, G., Wirth, G., Reis, R. (2014). Introduction. In: Protecting Chips Against Hold Time Violations Due to Variability. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-2427-3_1
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DOI: https://doi.org/10.1007/978-94-007-2427-3_1
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