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Oversampling Converters Beyond Continuous-Time Sigma-Delta for Nanometer CMOS Technologies

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Analog Circuit Design

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Abstract

This paper describes first the properties of Continuous-Time Sigma-Delta ADCs which make this type of converters attractive for low-power and high-bandwidth applications. Cascaded architectures are analyzed as a possible way to further improve the analog bandwidth. The limits towards nanometer technology integration are then described, showing how the time-encoding theory can be successfully applied to overcome them. Two different implementations are introduced (PWM-based and VCO-based), and some case-studies are given to support the theories. Conclusions are drawn, with emphasis on possible future development steps.

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Author information

Authors and Affiliations

  1. Lantiq, Villach, Austria

    A. Di Giandomenico, R. Gaggl & J. Hauptmann

  2. UCIIIM, Madrid, Spain

    L. Hernandez, E. Prefasi & S. Paton

  3. Infineon Technologies, Villach, Austria

    A. Wiesbauer

Authors
  1. A. Di Giandomenico
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  2. L. Hernandez
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  3. E. Prefasi
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  4. S. Paton
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  5. A. Wiesbauer
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  6. R. Gaggl
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  7. J. Hauptmann
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Editor information

Editors and Affiliations

  1. , Dept. Elektrotechniek, K.U.Leuven, Kardinaal Mercierlaan 94, HEVERLEE, B-3001, Belgium

    Michiel Steyaert

  2. Electrical Engineering, Mixed-signal Microelectronics Group, Technical University Eindhoven, Eindhoven, 5600 MB, Netherlands

    Arthur van Roermund

  3. , Department of Physics, University of Milan-Bicocca, Milan, Italy

    Andrea Baschirotto

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Di Giandomenico, A. et al. (2012). Oversampling Converters Beyond Continuous-Time Sigma-Delta for Nanometer CMOS Technologies. In: Steyaert, M., van Roermund, A., Baschirotto, A. (eds) Analog Circuit Design. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-1926-2_4

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  • DOI: https://doi.org/10.1007/978-94-007-1926-2_4

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