Skip to main content
SpringerLink
Log in

Implementations

  • Chapter
Design and Implementation of Fully-Integrated Inductive DC-DC Converters in Standard CMOS

Part of the book series: Analog Circuits and Signal Processing ((ACSP))

  • 2832 Accesses

Abstract

The goal of this book is to enable realization of monolithic inductive DC-DC converters, having both maximal overall power conversion efficiency and a maximal power density. Therefore, the novel control schemes, together with practical circuit implementations, are used to increase the average performance. The combined knowledge of both inductive DC-DC converter and control techniques and systems, leads to the various practical chip realizations, which are described in this chapter. Thereby, the hands-on approach is continued, providing the designer the essential feeling of the various practical implementation and measurements issues. At the same time the reader is provided with the idea of what (and what not) is to be expected from monolithic inductive DC-DC converters in various standard CMOS technologies, performance wise. The practical implementation possibilities, involving the essential components of the DC-DC converter’s power stage: inductors, capacitors and switches, are discussed in Sect. 6.1. Comments on the main measurement principles and setups are provided in Sect. 6.2. The various practical implementations of monolithic inductive boost and buck converters are discussed in the respective Sects. 6.3 and 6.4. A side-by-side comparison of the measurements of the implementations discussed in this book and the implementations described in the literature is performed in Sect. 6.5. Finally, this chapter is concluded in Sect. 6.6.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 149.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 199.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 199.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Notes

  1. 1.

    The standard bondwire diameter used in the practical implementations in this work is 25 μm.

  2. 2.

    The gate-leakage depends on the manufacturer of the CMOS process and the minimum feature size. Generally, this becomes abruptly significant from 90 nm CMOS technologies onwards.

  3. 3.

    For deep-submicron technologies R channel□ is in the order of 5 kΩ/□, for U gs =U dd .

  4. 4.

    For deep-submicron technologies R poly□ is in the order of 10 Ω/□.

  5. 5.

    For deep-submicron technologies \(R_{n^{+}\square}\) is in the order of 10 Ω/□.

  6. 6.

    For deep-submicron technologies R cont_g is in the order of 15 Ω/□.

  7. 7.

    For deep-submicron technologies R cont_ds is in the order of 15 Ω/□.

  8. 8.

    In reality the decouple capacitor consists of multiple parallel capacitors of different values, ranging from 100 pF to a few hundred μF, for achieving an improved frequency response.

  9. 9.

    In reality the inductors are polygons, consisting of 32 corners.

  10. 10.

    The capacitance C of the output capacitor is not provided in either [Sav03] nor [Ric04].

References

  1. S. Abedinpour, B. Bakkaloglu, S. Kiaei, A Multistage Interleaved Synchronous Buck Converter with Integrated Output Filter in 0.18 μm SiGe Process. IEEE Trans. Power Electron. 22(6), 2164–2175 (2007). doi:10.1109/TPEL.2007.909288

    Article  Google Scholar 

  2. C.H. Ahn, M.G. Allen, A Comparison of Two Micromachined Inductors (Bar- and Meander-Type) for Fully Integrated Boost DC/DC Power Converters. IEEE Trans. Power Electron. 11(2), 239–245 (1996). doi:10.1109/63.486171

    Article  Google Scholar 

  3. S. Ajram, G. Salmer, Ultrahigh Frequency DC-to-DC Converters Using GaAs Power Switches. IEEE Trans. Power Electron. 16(5), 594–602 (2001). doi:10.1109/63.949492

    Article  Google Scholar 

  4. M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, P. Palmer, A 3 GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90 nm CMOS with Integrated Output Filter, in IEEE International Solid-State Circuits Conference ISSCC: Digest of Technical Papers, 2007, pp. 532–620. doi:10.1109/ISSCC.2007.373529

    Google Scholar 

  5. M. Alimadadi, S. Sheikhaei, G. Lemieux, S. Mirabbasi, W.G. Dunford, P.R. Palmer, A Fully Integrated 660 MHz Low-Swing Energy-Recycling DC-DC Converter. IEEE Trans. Power Electron. 24(6), 1475–1485 (2009). doi:10.1109/TPEL.2009.2013624

    Article  Google Scholar 

  6. R. Aparicio, A. Hajimiri, Capacity Limits and Matching Properties of Integrated Capacitors. IEEE J. Solid-State Circuits 37(3), 384–393 (2002). doi:10.1109/4.987091

    Article  Google Scholar 

  7. H.J. Bergveld, R. Karadi, K. Nowak, An Inductive Down Converter System-in-package for Integrated Power Management in Battery-Powered Applications, in IEEE Power Electronics Specialists Conference PESC, 2008, pp. 3335–3341. doi:10.1109/PESC.2008.4592470

    Google Scholar 

  8. H.J. Bergveld, K. Nowak, R. Karadi, S. Iochem, J. Ferreira, S. Ledain, E. Pieraerts, M. Pommier, A 65-nm-CMOS 100-MHz 87-Efficient DC-DC Down Converter Based on Dual-Die System-in-Package Integration, in IEEE Energy Conversion Congress and Exposition ECCE, 2009, pp. 3698–3705. doi:10.1109/ECCE.2009.5316334

    Chapter  Google Scholar 

  9. T.V. Breussegem, M. Steyaert, A 82% Efficiency 0.5% Ripple 16-Phase Fully Integrated Capacitive Voltage Doubler, in IEEE Proceedings of the 2009 Symposium on VLSI Circuits, vol. 1, 2009, pp. 198–199

    Google Scholar 

  10. J. Craninckx, Low-Phase-Noise Fully Integrated CMOS Frequency Synthesizers, PhD thesis, ESAT-MICAS, K.U. Leuven, Belgium, 1997

    Google Scholar 

  11. D.S. Gardner, G. Schrom, P. Hazucha, F. Paillet, T. Karnik, S. Borkar, Integrated On-Chip Inductors with Magnetic Films. IEEE Trans. Magn. 43(6), 2615–2617 (2007). doi:10.1109/TMAG.2007.893794

    Article  Google Scholar 

  12. M. Ghovanloo, K. Najafi, Fully Integrated Wideband High-Current Rectifiers for Inductively Powered Devices. IEEE J. Solid-State Circuits 39(11), 1976–1984 (2004). doi:10.1109/JSSC.2004.835822

    Article  Google Scholar 

  13. P. Hazucha, G. Schrom, J. Hahn, B.A. Bloechel, P. Hack, G.E. Dermer, S. Narendra, D. Gardner, T. Karnik, V. De, S. Borkar, A 233-MHz 80-87 Efficient Four-Phase DC-DC Converter Utilizing Air-Core Inductors on Package. IEEE J. Solid-State Circuits 40(4), 838–845 (2005). doi:10.1109/JSSC.2004.842837

    Article  Google Scholar 

  14. N. Jinhua, Z. Hong, B.Y. Liu, Improved On-Chip Components for Integrated DC-DC Converters in 0.13 m CMOS, in Proceedings of the European Solid-State Circuits Conference ESSCIRC, 2009, pp. 448–451. doi:10.1109/ESSCIRC.2009.5325987

    Google Scholar 

  15. H. Johari, F. Ayazi, High-Density Embedded Deep Trench Capacitors in Silicon with Enhanced Breakdown Voltage. IEEE Trans. Compon. Packag. Technol. 32(4), 808–815 (2009). doi:10.1109/TCAPT.2009.2024210

    Article  Google Scholar 

  16. M. Kamon, M.J. Tsuk, J.K. White, FASTHENRY: A Multipole-Accelerated 3-D Inductance Extraction Program. IEEE Trans. Microw. Theory Tech. 42(9), 1750–1758 (1994). doi:10.1109/22.310584

    Article  Google Scholar 

  17. V. Kursun, G. Schrom, V.K. De, E.G. Friedman, S.G. Narendra, Cascode Buffer for Monolithic Voltage Conversion Operating at High Input Supply Voltages, in IEEE International Symposium on Circuits and Systems ISCAS, vol. 1, 2005, pp. 464–467. doi:10.1109/ISCAS.2005.1464625

    Google Scholar 

  18. S. Lam, W.H. Ki, K.C. Kwok, M. Chan, Realization of Compact MOSFET Structure by Waffle-Layout, in Proceeding of the 31st European Solid-State Device Research Conference, 2001, pp. 119–122

    Google Scholar 

  19. H.P. Le, M. Seeman, S.R. Sanders, V. Sathe, S. Naffziger, E. Alon, A 32 nm Fully Integrated Reconfigurable Switched-Capacitor DC-DC Converter Delivering 0.55 W/mm2 at 81 Efficiency, in IEEE International Solid-State Circuits Conference ISSCC: Digest of Technical Papers, 2010, pp. 210–211. doi:10.1109/ISSCC.2010.5433981

    Google Scholar 

  20. J. Lu, H. Jia, X. Wang, K. Padmanabhan, W.G. Hurley, Z.J. Shen, Modeling, Design, and Characterization of Multiturn Bondwire Inductors with Ferrite Epoxy Glob Cores for Power Supply System-on-Chip or System-in-Package Applications. IEEE Trans. Power Electron. 25(8), 2010–2017 (2010). doi:10.1109/TPEL.2010.2045514

    Article  Google Scholar 

  21. S.Q. Malik, R.L. Geiger, Minimization of Area in Low-Resistance MOS Switches, in Proceedings of the IEEE Midwest Symposium on Circuits and Systems, vol. 3, 2000, pp. 1392–1395. doi:10.1109/MWSCAS.2000.951473

    Google Scholar 

  22. S. Musunuri, P.L. Chapman, J. Zou, L. Chang, Design Issues for Monolithic DC-DC Converters. IEEE Trans. Power Electron. 20(3), 639–649 (2005). doi:10.1109/TPEL.2005.846527

    Article  Google Scholar 

  23. K. Onizuka, K. Inagaki, H. Kawaguchi, M. Takamiya, T. Sakurai, Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs. IEEE J. Solid-State Circuits 42(11), 2404–2410 (2007). doi:10.1109/JSSC.2007.906204

    Article  Google Scholar 

  24. A.M. Pernia, M.J. Prieto, J.M. Lopera, J. Reilly, S.S. Linton, C. Quinones, Thick-Film Hybrid Technology for Low-Output-Voltage DC/DC Converter. IEEE Trans. Ind. Appl. 40(1), 86–93 (2004). doi:10.1109/TIA.2003.821814

    Article  Google Scholar 

  25. W. Reczek, W. Pribyl, Guidelines for Latch-Up Characterization Techniques, in Proceedings of the 1988 IEEE International Conference on Microelectronic Test Structures ICMTS, 1988, pp. 120–125

    Google Scholar 

  26. A. Richelli, L. Collalongo, M. Quarantelli, M. Caramina, Z.M. Kovaćs-Vanja, A Fully-Integrated Inductor-Based 1.8-6-V Step-Up Converter. IEEE J. Solid-State Circuits 39(1), 242–245 (2004)

    Article  Google Scholar 

  27. H. Samavati, A. Hajimiri, A.R. Shahani, G.N. Nasserbakht, T.H. Lee, Fractal Capacitors. IEEE J. Solid-State Circuits 33(12), 2035–2041 (1998). doi:10.1109/4.735545

    Article  Google Scholar 

  28. A. Savio, A. Richelli, L. Colalongo, Z.M. Kowacs-Vajna, A Fully-Integrated Self-Tuned Transformer Based Step-Up Converter, in IEEE Proceedings of the International Symposium on Circuits and Systems, vol. 1, 2003, pp. 357–360

    Google Scholar 

  29. B. Serneels, T. Piessens, M. Steyaert, W. Dehaene, A High-Voltage Output Driver in a 2.5-V 0.25 μm CMOS Technology. IEEE J. Solid-State Circuits 40(3), 576–583 (2005). doi:10.1109/JSSC.2005.843599

    Article  Google Scholar 

  30. B. Serneels, High Voltage Line Drivers for XDSL in Nanometer CMOS, PhD thesis, ESAT-MICAS, K.U. Leuven, Belgium, 2007

    Google Scholar 

  31. H.A.C. Tilmans, K. Baert, A. Verbist, R. Puers, CMOS Foundry-Based Micromachining. IEEE J. Micromech. Microeng. 6(1), 122–127 (1996)

    Article  Google Scholar 

  32. M. Wens, K. Cornelissens, M. Steyaert, A Fully-Integrated 0.18 μm CMOS DC-DC Step-Up Converter, Using a Bondwire Spiral Inductor, in IEEE Proceedings of the European Solid-State Circuits Conference, vol. 33, 2007, pp. 268–271

    Google Scholar 

  33. M. Wens, M. Steyaert, A Fully-Integrated 0.18 μm CMOS DC-DC Step-Down Converter, Using a Bondwire Spiral Inductor, in IEEE Proceedings of the Custom Integrated Circuits Conference, vol. 30, 2008, pp. 17–20

    Google Scholar 

  34. M. Wens, M. Steyaert, A Fully-Integrated 130 nm CMOS DC-DC Step-Down Converter, Regulated by a Constant On/Off-Time Control System, in IEEE Proceedings of the European Solid-State Circuits Conference, vol. 34, 2008, pp. 62–65

    Google Scholar 

  35. M. Wens, J.M. Redoute, T. Blanchaert, N. Bleyaert, M. Steyaert, An Integrated 10 A, 2.2 ns Rise-Time Laser-Diode Driver for Lidar Applications, in IEEE Proceedings of the European Solid-State Circuits Conference, vol. 35, 2009, pp. 144–147

    Google Scholar 

  36. M. Wens, M. Steyaert, An 800 mW Fully-Integrated 130 nm CMOS DC-DC Step-Down Multi-Phase Converter, with On-Chip Spiral Inductors and Capacitors, in IEEE Energy Conversion Congress and Exposition, vol. 1, 2009, pp. 3706–3709

    Chapter  Google Scholar 

  37. J. Wibben, R. Harjani, A High-Efficiency DC-DC Converter Using 2 nH Integrated Inductors. IEEE J. Solid-State Circuits 43(4), 844–854 (2008)

    Article  Google Scholar 

  38. J.C. Wu, M.E. Zaghloul, Robust CMOS Micromachined Inductors with Structure Supports for Gilbert Mixer Matching Circuits. IEEE Trans. Circuits Syst. II, Express Briefs 56(6), 429–433 (2009). doi:10.1109/TCSII.2009.2020925

    Article  Google Scholar 

  39. F. Zhang, P.R. Kinget, Design of Components and Circuits Underneath Integrated Inductors. IEEE J. Solid-State Circuits 41(10), 2265–2271 (2006). doi:10.1109/JSSC.2006.881547

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. ESAT-MICAS, Dept. Elektrotechniek, K.U. Leuven, Room 91.22, Kasteelpark, Arenberg 10, Leuven, B-3001, Belgium

    Dr. Mike Wens

  2. ESAT-MICAS, Dept. Elektrotechniek, K.U. Leuven, Kardinaal Mercierlaan 94, Heverlee, B-3001, Belgium

    Prof. Dr. Michiel Steyaert

Authors
  1. Dr. Mike Wens
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Prof. Dr. Michiel Steyaert
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Mike Wens .

Rights and permissions

Reprints and permissions

Copyright information

© 2011 Springer Science+Business Media B.V.

About this chapter

Cite this chapter

Wens, M., Steyaert, M. (2011). Implementations. In: Design and Implementation of Fully-Integrated Inductive DC-DC Converters in Standard CMOS. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-1436-6_6

Download citation

  • DOI: https://doi.org/10.1007/978-94-007-1436-6_6

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-94-007-1435-9

  • Online ISBN: 978-94-007-1436-6

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation