Abstract
The last chapter summarizes and concludes the book. A per chapter summary is given and the main conclusions and original contributions are presented. The chapter ends with some recommendations for future research.
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Y.Z. Lin, S.J. Chang, Y.T. Liu, C.C. Liu, G.Y. Huang, A 5 b 800 MS/s 2 mW asynchronous binary-search ADC in 65 nm CMOS, in ISSCC Dig. Tech. Papers (2009), pp. 80–81
G. van der Plas, B. Verbruggen, A 150 MS/s 133 μW 7 b ADC in 90 nm digital CMOS using a comparator-based asynchronous binary-search sub-ADC, in ISSCC Dig. Tech. Papers (2008), pp. 242–243
M. van Elzakker, A.J.M. van Tuijl, P.F.J. Geraedts, D. Schinkel, E.A.M. Klumperink, B. Nauta, A 1.9 μW 4.4 fJ/conversion-step 10 b 1 MS/s charge-redistribution ADC, in ISSCC Dig. Tech. Papers (2008), pp. 245–245
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Louwsma, S., van Tuijl, E., Nauta, B. (2011). Summary and Conclusions. In: Time-interleaved Analog-to-Digital Converters. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9716-3_5
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DOI: https://doi.org/10.1007/978-90-481-9716-3_5
Publisher Name: Springer, Dordrecht
Print ISBN: 978-90-481-9715-6
Online ISBN: 978-90-481-9716-3
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