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Computing with Probabilistic Transfer Matrices

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Design, Analysis and Test of Logic Circuits Under Uncertainty

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 115))

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Abstract

We demonstrate the compressed encoding of probabilistic transfer matrices as algebraic decision diagrams (ADDs) and develop equivalent ADD algorithms for PTM operations that can operate directly on the compressed forms and compute circuit error probabilities. We also develop methods to handle non-square matrices, which have not been represented as decision diagrams in the prior literature. We present several heuristic methods for further improving the scalability of PTMs, including sampling, partitioning, evaluation ordering, and hierarchical computations, which allow PTM computations to scale to larger circuits.

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References

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Correspondence to Smita Krishnaswamy .

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Krishnaswamy, S., Markov, I.L., Hayes, J.P. (2013). Computing with Probabilistic Transfer Matrices. In: Design, Analysis and Test of Logic Circuits Under Uncertainty. Lecture Notes in Electrical Engineering, vol 115. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9644-9_3

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  • DOI: https://doi.org/10.1007/978-90-481-9644-9_3

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  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-9643-2

  • Online ISBN: 978-90-481-9644-9

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