Abstract
The obvious advantage of designing NAND devices capable of storing n-bit/cell (where n is currently 2, 3, and 4) is the resulting reduction in area occupation of the matrix. However, the benefits of 3-bit/cell (or 8-Level-Cell, 8LC) and 4-bit/cell (or 16-Level-Cell, 16LC) technologies don’t come for free.
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Micheloni, R., Crippa, L. (2010). XLC storage. In: Inside NAND Flash Memories. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9431-5_16
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DOI: https://doi.org/10.1007/978-90-481-9431-5_16
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