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Linear CMOS RF Power Amplifiers for Wireless Applications pp 137–156Cite as

Appendix B: Procedure for Impedance Matching of Printed-Circuit RF Amplifiers

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Part of the book series: Analog Circuits and Signal Processing ((ACSP))

Abstract

This second and last appendix presents a systematic procedure for impedance matching of RF amplifiers mounted on printed-circuit boards. This procedure involves two-tier de-embedding techniques and on-board impedance matching aided by the Smith chart. The application of this procedure to match a CMOS RF power amplifier operating at 5.2 GHz resulted in a power gain of 8 dB, which is 5.6 dB higher than its unmatched gain (2.4 dB) and only 1.1 dB lower than its maximum theoretical gain (9.1 dB).

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Notes

  1. 1.

    It could also be a commercial RF amplifier or transistor, but, in these cases, the matching difficulties could be caused by the lack of information about package parasitics at the desired frequency.

  2. 2.

    In this example, without loss of accuracy, the step discontinuities in the microstrip line model were considered to be lossless when using the Smith Chart software.

  3. 3.

    This can also be done through matrix algebra making optional the use of the simulator.

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Authors and Affiliations

  1. École Polytechnique Fédérale de Lausanne (EPFL), 1015, Lausanne, Switzerland

    Dr. Paulo Augusto Dal Fabbro & Prof. Maher Kayal

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  1. Dr. Paulo Augusto Dal Fabbro
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  2. Prof. Maher Kayal
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Correspondence to Paulo Augusto Dal Fabbro .

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Dal Fabbro, P.A., Kayal, M. (2010). Appendix B: Procedure for Impedance Matching of Printed-Circuit RF Amplifiers. In: Linear CMOS RF Power Amplifiers for Wireless Applications. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9361-5_10

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  • DOI: https://doi.org/10.1007/978-90-481-9361-5_10

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-9360-8

  • Online ISBN: 978-90-481-9361-5

  • eBook Packages: EngineeringEngineering (R0)

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