Abstract
In many new applications like communication and automotive electronics the usage of integrated high voltage MOS transistors (LDMOS and DMOS) requires highly accurate compact models. In this chapter we present a deep look into special LDMOS transistor behavior and discuss state of the art sub-circuit modeling with BSIM/EKV core and JFET/Resistor approach. Parasitic diode and bipolar effects are discussed and modeling suggestions are presented. The EKV high voltage model developed by Swiss Federal Institute of Technology (EPFL) and the MM20 high voltage model introduced by NXP Research (formerly Philips Research) Laboratories is demonstrated in detail. The first CMC (Compact Modeling Council) standard high voltage MOSFET model HiSIM_HV developed by Hiroshima University is explained as well. Finally, characterization and measurement strategies for LDMOS modeling are described.
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Seebacher, E., Molnar, K., Posch, W., Senapati, B., Steinmair, A., Pflanzl, W. (2010). High-Voltage MOSFET Modeling. In: Gildenblat, G. (eds) Compact Modeling. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-8614-3_4
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DOI: https://doi.org/10.1007/978-90-481-8614-3_4
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