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PSP-SOI: A Surface-Potential-Based Compact Model of SOI MOSFETs

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Abstract

Surface-potential-based models, which represent the mainstream approach to compact modeling of bulk MOSFETs, are now in the process of being applied to SOI devices. In this chapter we discuss two advanced SOI models—PSP-SOI-PD for partially depleted devices and PSP-SOI-DD including the dynamic depletion effects. Both models are based on the popular PSP model of bulk MOSFETs. The theoretical foundation of all PSP-family models is the symmetric linearization method that allows one to raise the physical contents of the compact model without prohibitive increase in its computational complexity. In addition to the physics-based structure of the new models inherited from bulk PSP, they account for phenomena specific to SOI devices (e.g. floating body, and valence band tunneling current) and include a detailed description of parasitic effects. We discuss both the theoretical developments and verification of the model against test data and TCAD simulations with particular emphasis on the interplay between the model structure and its simulation capabilities.

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Acknowledgments

The development of PSP-SOI is partially supported by Semiconductor Research Corporation. The authors are grateful to C.C. McAndrew, J. Watts, and G.O. Workman for insightful discussions, and H. Barnaby and G. Dessai for reading the manuscript and valuable comments.

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Wu, W., Yao, W., Gildenblat, G. (2010). PSP-SOI: A Surface-Potential-Based Compact Model of SOI MOSFETs. In: Gildenblat, G. (eds) Compact Modeling. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-8614-3_2

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