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ReCoNets—Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections

  • Christian Haubelt
  • Dirk Koch
  • Felix Reimann
  • Thilo Streichert
  • Jürgen Teich
Chapter

Abstract

Automotive, avionic or body-area networks are systems that consist of several communicating control units specialized for certain purposes. Typically, constraints regarding reliability, availability but also flexibility are imposed on these systems. In this chapter, we will present the ReCoNets approach for increasing reliability and flexibility of such systems by solving the hardware/software codesign problem online. A ReCoNet allows to migrate tasks implemented in hardware or software from one node to another. Typically, it consists of a network of communicating Field-Programmable Gate Arrays (FPGAs) and CPUs. Moreover, if a sufficient number of hardware/software resources is not available, the migration of functionality from hardware to software or vice versa is initiated by the system itself. For supporting such flexibility, new design methods as well as services integrated in a distributed operating system for networked embedded systems are revealed. Besides the formal definition of methods and concepts providing several self-x properties such as self-healing, self-adaptiveness and self-optimization, a ReCoNet demonstrator is presented hosting a driver assistance application.

Keywords

Design Space Exploration Task Migration Lane Detection Triple Modular Redundancy Diffusion Algorithm 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Bryant, R.E.: Graph-based algorithms for Boolean function manipulation. IEEE Trans. Comput. 35(8), 677–691 (1986) zbMATHCrossRefGoogle Scholar
  2. 2.
    Cybenko, G.: Dynamic load balancing for distributed memory multiprocessors. J. Parall. Distrib. Comput. 7, 279–301 (1989) CrossRefGoogle Scholar
  3. 3.
    DeLong, T., Smith, D., Johnson, B.: Dependability metrics to assess safety-critical systems. IEEE Trans. Reliab. 54(3), 498–505 (2005) CrossRefGoogle Scholar
  4. 4.
    Dittmann, F., Rammig, F., Streubühr, M., Haubelt, C., Schallenberg, A., Nebel, W.: Exploration, partitioning and simulation of reconfigurable systems. Inf. Technol. 49(3), 149–156 (2007) Google Scholar
  5. 5.
    Douceur, J.R., Wattenhofer, R.: Competitive hill-climbing strategies for replica placement in a distributed file system. In: DISC ’01: Proceedings of the 15th International Conference on Distributed Computing, pp. 48–62. Springer, London (2001) Google Scholar
  6. 6.
    Elnozahy, E.N.M., Alvisi, L., Wang, Y.M., Johnson, D.: A survey of rollback-recovery protocols in message-passing systems. ACM Comput. Surv. 34(3) (2002) Google Scholar
  7. 7.
    Elsässer, R., Frommer, A., Monien, B., Preis, R.: Optimal and alternating-direction loadbalancing schemes. In: Proc. of Euro-Par 99, Parallel Processing, pp. 280–290 (1999) Google Scholar
  8. 8.
    Glaß, M., Lukasiewycz, M., Streichert, T., Haubelt, C., Teich, J.: Reliability-aware system synthesis. In: Proc. of DATE ’07, pp. 409–414 (2007) Google Scholar
  9. 9.
    Glaß, M., Lukasiewycz, M., Reimann, F., Haubelt, C., Teich, J.: Symbolic reliability analysis of self-healing networked embedded systems. In: Proceedings of the International Conference on Computer Safety, Reliability and Security (SAFECOMP 2008), Newcastle upon Tyne, UK, pp. 139–152 (2008) Google Scholar
  10. 10.
    Koch, D., Streichert, T., Dittrich, S., Strengert, C., Haubelt, C., Teich, J.: An operating system infrastructure for fault-tolerant reconfigurable networks. In: Proceedings of the 19th International Conference on Architecture of Computing Systems (ARCS 2006), Frankfurt/Main, Germany, pp. 202–216. Springer, Frankfurt (2006) Google Scholar
  11. 11.
    Koch, D., Beckhoff, C., Teich, J.: Bitstream decompression for high speed FPGA configuration from slow memories. In: Proceedings of International Conference on Field-Programmable Technology 2007 (ICFPT07), pp. 161–168. IEEE Press, Kokurakita (2007) CrossRefGoogle Scholar
  12. 12.
    Koch, D., Haubelt, C., Streichert, T., Teich, J.: Modeling and synthesis of hardware/software morphing. In: ISCAS ’07, New Orleans, CA, USA, pp. 2746–2749 (2007) Google Scholar
  13. 13.
    Koch, D., Haubelt, C., Teich, J.: Efficient hardware checkpointing—concepts, overhead analysis, and implementation. In: Proceedings of the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2007), pp. 188–196. ACM, Monterey (2007) CrossRefGoogle Scholar
  14. 14.
    Koch, D., Beckhoff, C., Teich, J.: ReCoBus-Builder—a Novel Tool and Technique to Build Statically and Dynamically Reconfigurable Systems for FPGAs. In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL 08), Heidelberg, Germany, pp. 119–124 (2008) Google Scholar
  15. 15.
    Koch, D., Haubelt, C., Teich, J.: Efficient reconfigurable on-chip buses for FPGAs. In: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2008), pp. 287–290. IEEE Computer Society, Palo Alto (2008) Google Scholar
  16. 16.
    Koch, D., Streichert, T., Haubelt, C., Teich, J.: Logic Chip, logic system and method for designing a logic chip. PCT/EP2008/007342 (2008) Google Scholar
  17. 17.
    Koch, D., Streichert, T., Haubelt, C., Teich, J.: Logic chip, method and computer program for providing a configuration information for a configurable logic chip. PCT/EP2008/007343 (2008) Google Scholar
  18. 18.
    Koch, D., Beckhoff, C., Teich, J.: Minimizing internal fragmentation by fine-grained two-dimensional module placement for runtime reconfigurable systems. In: 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2009), pp. 251–254. IEEE Computer Society, Napa (2009) CrossRefGoogle Scholar
  19. 19.
    Koch, D., Beckhoff, C., Teich, J.: A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. In: Proceedings of the 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2009), pp. 233–236. ACM, Monterey (2009) Google Scholar
  20. 20.
    Koch, D., Beckhoff, C., Teich, J.: Hardware decompression techniques for FPGA-based embedded systems. ACM Trans. Reconfigurable Technol. Syst. 2(2), 1–23 (2009) CrossRefGoogle Scholar
  21. 21.
    Lysaght, P., Blodget, B., Mason, J., Young, J., Bridgford, B.: Invited paper: Enhanced architecture, design methodologies and CAD tools for dynamic reconfiguration of Xilinx FPGAs. In: Proc. of the 16th Int. Conf. on Field Programmable Logic and Application (FPL’06), pp. 1–6 (2006) Google Scholar
  22. 22.
    Powell, D., Bonn, G., Seaton, D., Verissimo, P., Waeselynck, F.: The delta-4 approach to dependability in open distributed computing systems. In: Symposium on Fault-Tolerant Computing, pp. 56–61 (1995) Google Scholar
  23. 23.
    Purshouse, R., Fleming, P.: On the evolutionary optimization of many conflicting objectives. IEEE Trans. Evol. Comput. 11(6), 770–784 (2007) CrossRefGoogle Scholar
  24. 24.
    Reimann, F., Glaß, M., Lukasiewycz, M., Haubelt, C., Keinert, J., Teich, J.: Symbolic Voter Placement for Dependability-Aware System Synthesis. In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Atlanta GA, USA, pp. 237–242 (2008) Google Scholar
  25. 25.
    Streichert, T., Haubelt, C., Teich, J.: Distributed HW/SW-partitioning for embedded reconfigurable systems. In: Proc. of DATE ’05, Munich, Germany, pp. 894–895 (2005) Google Scholar
  26. 26.
    Streichert, T., Koch, D., Haubelt, C., Teich, J.: Modeling and design of fault-tolerant and self-adaptive reconfigurable networked embedded systems. EURASIP J. Embed. Syst. 2006, 1–15 (2006). doi: 10.1155/ES/2006/42168 CrossRefGoogle Scholar
  27. 27.
    Streichert, T., Glaß, M., Wanka, R., Haubelt, C., Teich, J.: Topology-aware replica placement in fault-tolerant embedded networks. In: Proceedings of ARCS ’08, pp. 23–37 (2008) Google Scholar
  28. 28.
    Streichert, T., Haubelt, C., Koch, D., Teich, J.: Concepts for self-adaptive and self-healing networked embedded systems. In: Würtz, R.P. (ed.) Organic Computing. Understanding Complex Systems, pp. 241–260. Springer, Berlin (2008) CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Christian Haubelt
    • 1
  • Dirk Koch
    • 1
  • Felix Reimann
    • 1
  • Thilo Streichert
    • 2
  • Jürgen Teich
    • 1
  1. 1.Hardware/Software Co-Design, Department of Computer ScienceUniversity of Erlangen-NurembergErlangenGermany
  2. 2.Daimler AGGroup Research & Advanced EngineeringSindelfingenGermany

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