Abstract
In this paper an overview of state of the art techniques to measure and correct non-idealities in a pipelined ADC is given. The paper discusses the motivations for digital calibration, and subsequently details state of the art calibration approaches. System tradeoffs of commonly used calibration techniques are analyzed. A discussion of how digital calibration can be used to enable the next generation of very low power ‘smart-ADCs’ is also given.
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Ahmed, I. (2010). Pipelined ADC Digital Calibration Techniques and Tradeoffs. In: Roermund, A., Casier, H., Steyaert, M. (eds) Analog Circuit Design. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-3083-2_2
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DOI: https://doi.org/10.1007/978-90-481-3083-2_2
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