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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 40))

XPP-III is a fully programmable coarse-grain reconfigurable processor. It is scalable and built from several modules: the reconfigurable XPP Array for high bandwidth dataflow processing, the Function-PAEs for sequential code sections and other modules for data communication and storage. XPP-III is programmable in C and comes with a cycle-accurate simulator and a complete development environment. A specific XPP-III hardware implementation is integrated in the MORPHEUS chip.

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References

  1. PACT XPP Technologies, XPP-III Processor Overview (White Paper), 2006, www.pactxpp.com.

  2. PACT XPP Technologies, Reconfiguration on XPP-III Processors (White Paper), 2006 www.pactxpp.com.

  3. PACT XPP Technologies, Programming XPP-III Processors (White Paper), 2006 www.pactxpp.com.

  4. PACT XPP Technologies, Video Decoding on XPP-III (White Paper), 2006 www.pactxpp.com.

  5. V. Baumgarte, G. Ehlers, F. May, A. Nückel, M. Vorbach, and M. Weinhardt, PACT XPP — A Self-Reconfigurable Data Processing Architecture, The Journal of Supercomputing, Vol. 26, No. 2, Sept. 2003, Kluwer Academic Publishers.

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  6. J. M. P. Cardoso and M. Weinhardt, Chapter 9, Compilation and Temporal Partitioning for a Coarse-Grain Reconfigurable Architecture, in New Algorithms, Architectures and Applications for Reconfigurable Computing (editors: P. Lysaght, W. Rosenstiel), Springer, Dordrecht, NL, 2005.

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Schüler, E., Weinhardt, M. (2009). XPP-III. In: Voros, N.S., Rosti, A., Hübner, M. (eds) Dynamic System Reconfiguration in Heterogeneous Platforms. Lecture Notes in Electrical Engineering, vol 40. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-2427-5_6

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  • DOI: https://doi.org/10.1007/978-90-481-2427-5_6

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-2426-8

  • Online ISBN: 978-90-481-2427-5

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