Skip to main content
SpringerLink
Log in

Charge Pumps for LCD Drivers

  • Chapter
Liquid Crystal Display Drivers

It was shown in Chapters 4 and 6 that LCD drivers, especially those for small-size panels, make extensive use of charge pumps. High-voltage boosting circuits are indeed required to generate the row and column voltages if the external supply is kept low to contain power consumption and area of the digital section [YKC2003], [SK2008]. Owing to the consequent relevance of an optimized CP design and also because a comprehensive treatment of the subject is missing in electronic textbooks, we decided to include this chapter as a conclusion of the book.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
eBook
USD 16.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. S. Atsumi, M. Kuriyama, A. Umezawa, H. Banba, K. Naruke, S. Yamada, Y. Ohshima, M. Oshikiri, Y. Hiura, T. Yamane, and K. Yoshikawa, “A 16-Mb Flash EEPROM with a New Self-Data-Refresh Scheme for a Sector Erase Operation,” IEEE Journal of Solid-State Circuits, Vol. 29, No. 4, pp. 461–468, 1994.

    Article  Google Scholar 

  2. G. den Besten and B. Nauta, “Embedded 5 V-to-3.3 V Voltage Regulator for Supplying Digital IC’s in 3.3 V CMOS Technology,” IEEE Journal of Solid-State Circuits, Vol. 33, No. 7, pp. 956–962, 1998.

    Article  Google Scholar 

  3. P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Flash Memories, Kluwer Academic Publishers, 1999.

    Google Scholar 

  4. A. Cabrini, L. Gobbi, and G. Torelli, “Voltage Gain Analysis of Integrated Fibonacci-Like Charge Pumps for Low Power Applications,” IEEE Transactions on Circuits and Systems - Part II, Vol. 54, No. 11, pp. 929–933, 2007.

    Article  Google Scholar 

  5. R. Castello and L. Tomasini, “1.5-V High-Performance SC Filters in BiCMOS Technology,” IEEE Journal of Solid-State Circuits, Vol. 26, No.7, pp. 930–936, 1991.

    Article  Google Scholar 

  6. J. Crockcroft and E. Walton, “Production of High Velocity Positive Ions,” Proceedings of the Royal Society, A, Vol. 136, pp. 619–630, 1932.

    Article  Google Scholar 

  7. J. Dickson, “On-Chip High-Voltage Generation MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique,” IEEE Journal of Solid-State Circuits, Vol. 11, No. 3, pp. 374–378, 1976.

    Article  Google Scholar 

  8. T. Duisters and E. Dijkmans, “A -90-dB THD Rail-to-Rail Input Opamp Using a New Local Charge Pump in CMOS,” IEEE Journal of Solid-State Circuits, Vol. 33, No. 7, pp. 947–955, 1998.

    Article  Google Scholar 

  9. G. Di Cataldo and G. Palumbo, “Optimized Design of an N-th Order Dickson Voltage Multiplier,” IEEE Transactions on Circuits and Systems - Part I, Vol. 43, No. 5, pp. 414–418, 1996.

    Article  Google Scholar 

  10. R. Gariboldi and F. Pulvirenti, “A Monolithic Quad Line Driver for Industrial Application,” IEEE Journal of Solid-State Circuits, Vol. 29, No. 9, pp. 957–962, 1994.

    Article  Google Scholar 

  11. R. Gariboldi and F. Pulvirenti, “A 70 mΩ Intelligent High Side Switch with Full Diagnostics,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 7, pp. 915–923, 1996.

    Article  Google Scholar 

  12. S. Hobrecht, “An Intelligent BiCMOS/DMOS Quad 1-A High-Side Switch,” IEEE Journal of Solid-State Circuits, Vol. 25, No. 6, pp. 1395–1402, 1990.

    Article  Google Scholar 

  13. T. Ishii, K. Oshima, H. Sato, T. Yoshitake, A. Sato, S. Kubono, K. Manita, T. Nakayama, and A. Hosogane, “A 126.6-mm2 AND-Type 512-Mb Flash Memory with 1.8-V Power Supply,” IEEE Journal of Solid-State Circuits, Vol. 36, No. 11, pp. 1707–1711, 2001.

    Article  Google Scholar 

  14. T. Jinbo, H. Nakata, K. Hashimoto, T. Watanabe, K. Ninomiya, T. Urai, M. Koike, T. Sato, N. Kodama, K. Oyama, and T. Okazawa, “A 5-V-Only 16-Mb Flash Memory with Sector Erase Mode,” IEEE Journal of Solid-State Circuits, Vol. 27, No. 11, pp. 1547–1553, 1992.

    Article  Google Scholar 

  15. G T. Kawahara, T. Kobayashi, Y. Jyouno, S.-I. Saeki, N. Miyamoto, T. Adachi, M. Kato, A. Sato, J. Yugami, H. Kume, and K. Kimura, “Bit-Line Clamped Sensing Multiplex and Accurate High Voltage Generator for Quarter-Micron Flash Memories,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 11, pp. 1590–1599, 1996.

    Article  Google Scholar 

  16. K.-S. Min and J.-Y. Chung, “A Fast Pump-Down VBB Generator for Sub-1.5-V DRAMs,” IEEE Journal of Solid-State Circuits, Vol. 36, No. 7, pp. 1154–1157, 2001.

    Article  Google Scholar 

  17. H. Morimura and N. Shibata, “A Step-Down Boosted-Wordline Scheme for 1-V Battery-Operated Fast SRAM’s,” IEEE Journal of Solid-State Circuits, Vol. 33, No. 8, pp. 1220–1227, 1998.

    Article  Google Scholar 

  18. A. Novo, A. Gerosa, and A. Neviani, “A Sub-Micron CMOS Programmable CP for Implantable Pacemaker,” Analog Integrated Circuits and Signal Processing, Vol. 27, No. 3, pp. 209–215, 2001.

    Article  Google Scholar 

  19. G. Palumbo, N. Barniol, and M. Bethaoui, “Improved Behavioral and Design Model of an N-th Order Charge Pump,” IEEE Transactions on Circuits and Systems - Part I, Vol. 47, No. 2, pp. 264–268, 2000.

    Article  Google Scholar 

  20. G. Palumbo and D. Pappalardo, “Charge Pump Circuits with only Capacitive Loads: Optimized Design,” IEEE Transaction on Circuits and Systems - Part II, Vol. 53, No. 2, pp. 128–132, February 2006.

    Article  Google Scholar 

  21. G. Palumbo, D. Pappalardo, M. Gaibotti, “Charge Pump Circuits: Power Consumption Optimization,” IEEE Transactions on Circuits and Systems - Part I, Vol. 49, No. 11, pp. 1535–1542, 2002.

    Article  Google Scholar 

  22. G. Palumbo, D. Pappalardo, and M. Gaibotti, “Charge Pump with Adaptive Stages for Non-Volatile Memories,” IEEE Proceedings of Circuits, Devices and Systems, Vol. 153, No. 2, pp. 136–142, 2006.

    Article  Google Scholar 

  23. J. Starzyk, Y. Jan, and F. Oiu, “A DC-DC Charge Pump Design Based on Voltage Doublers,” IEEE Transactions on Circuits and Systems - Part I, Vol. 48, No. 3, pp. 350–359, 2001.

    Article  Google Scholar 

  24. F. Su and W.-H. Ki, “Component-Efficient Multiphase Switched-Capacitor DCDC Converter with Configurable Conversion Ratios for LCD Driver Applications,” IEEE Transaction On Circuits and Systems - Part II, Vol. 55, No. 8, pp. 753–757, 2008.

    Article  Google Scholar 

  25. T. Tanzawa and S. Atsumi, “Optimization of Word-Line Booster Circuits for Low-Voltage Flash Memories,” IEEE Journal of Solid-State Circuits, Vol. 34, No. 8, pp. 1091–1098, 1999.

    Article  Google Scholar 

  26. T. Tanzawa and T. Tanaka, “A Dynamic Analysis of the Dickson Charge Pump Circuit,” IEEE Journal of Solid-State Circuits, Vol. 32, No. 8, pp. 1231–1240, 1997.

    Article  Google Scholar 

  27. T. Tanzawa, T. Tanaka, K. Takeuchi, and H. Nakamura, “Circuit Techniques for a 1.8-V-Only NAND Flash Memory,” IEEE Journal of Solid-State Circuits, Vol. 37, No. 1, pp. 84–89, 2002.

    Article  Google Scholar 

  28. A. Umezawa, M. Kuriyama, S. Atsumi, H. Banba, K. Imamiya, K. Naruke, S. Yamada, E. Obi, M. Oshikiri, T. Suzuki, M. Wada, and S. Tanaka, “A 5-V-Only Operation 0.6-εm Flash EEPROM with Row Decoder Scheme in Triple-Well Structure,” IEEE Journal of Solid-State Circuits, Vol. 27, No. 11, pp. 1540–1545, 1992.

    Article  Google Scholar 

  29. J. Witters, G. Groeseneken, and H. Maes, “Analysis and Modeling of On-Chip High-Voltage Generator Circuits for Use in EEPROM Circuits,” IEEE Journal of Solid-State Circuits, Vol. 24, No. 5, pp. 1372–1380, 1989.

    Article  Google Scholar 

  30. S.L. Wong, S. Venkitasubrahmanian, M.J. Kim, and J.C. Young, “Design of a 60-V 10-A Intelligent Power Switch Using Standard Cells,” IEEE Journal of Solid-State Circuits, Vol. SC-27, No. 3, pp. 429–432, 1992.

    Article  Google Scholar 

  31. T.-R. Ying, W.-H. Ki, and M. Chan, “Area-efficient CMOS Charge Pumps for LCD drivers,” IEEE Journal of Solid-State Circuits, Vol. 38, No. 10, pp. 1721–1725, 2003.

    Article  Google Scholar 

  32. M. Zhang, N. Llaser, and F. Devos, “Multi-Value Voltage-to-Voltage Converter Using a Multi-Stage Symmetrical Charge Pump for On-Chip EEPROM Programming,” Analog Integrated Circuits and Signal Processing, Vol. 27, No. 1–2, pp. 85–95, 2001.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Dipto. Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Università Catania, Viale Andrea Doria, 6, 95125, Catania, Italy

    Dr David J.R. Cristaldi & Prof Salvatore Pennisi

  2. STMicroelectronics, Stradale Primosole, 50, 95121, Catania, Italy

    Dr Francesco Pulvirenti

Authors
  1. Dr David J.R. Cristaldi
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Prof Salvatore Pennisi
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Dr Francesco Pulvirenti
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

Copyright information

© 2009 Springer Science+Business Media B.V.

About this chapter

Cite this chapter

Cristaldi, D.J., Pennisi, S., Pulvirenti, F. (2009). Charge Pumps for LCD Drivers. In: Liquid Crystal Display Drivers. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-2255-4_7

Download citation

  • DOI: https://doi.org/10.1007/978-90-481-2255-4_7

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-2254-7

  • Online ISBN: 978-90-481-2255-4

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation