Reinterpretation of Magnetic Tunnel Junctions as Stochastic Memristive Devices

  • Adrien F. Vincent
  • Nicolas Locatelli
  • Damien Querlioz
Part of the Cognitive Systems Monographs book series (COSMOS, volume 31)


Spin-transfer torque magnetic random access memory (STT-MRAM) is currently under intense academic and industrial development, since it features nonvolatility, high write and read speed, and outstanding endurance. The basic cell of STT-MRAM, the spin-transfer torque magnetic tunnel junction (STT-MTJ), is a resistive memory that can be switched by electrical current. STT-MTJs are nevertheless usually not considered as memristors as they feature only two stable memory states. Their specific stochastic behavior, however, can be particularly interesting for synaptic applications and can allow us reinterpreting STT-MTJs as “stochastic memristive devices.” In this chapter, we introduce basic concepts relating to STT-MTJs behavior and their possible use to implement learning-capable synapses. Using system-level simulations of an example of neuroinspired architecture, we highlight the potential of this technology for learning systems. We also compare the different programming regimes of STT-MTJs with regard to learning and evaluate the robustness of a learning system based on STT-MTJs to device variations and imperfections. These results open the way for unexplored applications of magnetic memory in low-power, cognitive-type systems.


Output Neuron Resistive Switching Ferromagnetic Layer Free Layer Magnetic Tunnel Junction 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



The authors would like to thank Jérôme Larroque, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Weisheng Zhao, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Thibaut Devolder, Dafiné Ravelosona, Pierre Bessiere, Jacques Droulez, Alice Mizrahi, Damir Vodenicarevic, Joseph Friedman, and Julie Grollier. Some of the works presented within this chapter were supported by the ANR COGNISPIN (ANR-13-JS03-0004-01), the FP7 ICT BAMBI (FP7-ICT-2013-C) projects, Laboratoire d’Excellence NanoSaclay (ANR-10-LABX-0035), and the CNRS/MI DEFI NANO program.


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Copyright information

© Springer (India) Pvt. Ltd. 2017

Authors and Affiliations

  • Adrien F. Vincent
    • 1
  • Nicolas Locatelli
    • 1
  • Damien Querlioz
    • 1
  1. 1.Institut d’Électronique Fondamentale, Université Paris-SudOrsayFrance

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