Abstract
The classical MOSFET serving as the main vehicle carrying integrated circuit technology forward with the help of its opposite polarity NMOS and PMOS devices combined into the well-known CMOS configuration has been constantly downscaled. Riding on the classical MOSFET workhorse, integrated circuits have steadily marched a long way towards the nanoscale. Constant field and constant voltage scaling schemes have been applied. The downscaling succeeded to a large extent in meeting the predictions of the Moore’s law before succumbing to physical limitations. Various problems encountered in moving towards smaller geometry devices are outlined and restrictions on downscaling supply and threshold voltages are laid down. The extent of solutions possible with classical MOSFET structure is indicated. Through such technological innovations, the classical MOSFET progressed unless it was realized that revolutionary process and structural improvements were necessary. The chapter surveys the scaling issues and looks at the solutions to the problems in the perspective of classical MOSFET device.
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References
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Review Exercises
Review Exercises
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4.1
State Moore’s law regarding the growth of transistor density in integrated circuits. What was the value of the variable x in the original version of this law? What are other two suggested values of x?
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4.2
Draw the cross-sectional diagram of a classical long-channel MOSFET . Indicate the different connection terminals. What is the role of the body/substrate terminal?
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4.3
What is meant by scaling of MOSFET? What are the motivations for scaling MOSFET?
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4.4
What is the basic idea of constant electric field scaling ? How is this idea implemented to achieve constancy of field?
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4.5
Show with relevant equations how does constant field affect the following parameters of a MOSFET: (i) linear drain-source current, (ii) saturation drain-source current, and (iii) intrinsic gate delay .
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4.6
Power density is not affected by constant field scaling. Show mathematically.
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4.7
From the equations for source-substrate and drain-substrate junctions, show that the donor and acceptor concentrations are multiplied by the scaling factor during constant field scaling of a MOSFET. Up to what limiting value is it possible to raise the doping density?
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4.8
Discuss the problems associated with lowering the threshold voltage of a MOSFET beyond a certain limit.
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4.9
Give arguments in support of the approach followed in constant voltage scaling. Why is it a more practical method than constant field scaling?
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4.10
During constant voltage scaling of a MOSFET, by what factor is the power density changed? Is it favorable for device operation? How do you compare the effect of constant voltage scaling on power density with that in constant field scaling?
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4.11
Write three harmful effects of constant voltage scaling on the operation of a MOSFET.
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4.12
What is meant by the subthreshold current of a MOSFET? How is it related to the standby power dissipation of a device?
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4.13
What is subthreshold slope of a MOSFET? How is it related with its subthreshold swing? What is the ideal value of subthreshold swing ?
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4.14
What is the constraint on reducing the threshold voltage with respect to the supply voltage? State any relationship prescribed for deciding the threshold voltage at a given supply voltage.
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Khanna, V.K. (2016). Downscaling Classical MOSFET. In: Integrated Nanoelectronics. NanoScience and Technology. Springer, New Delhi. https://doi.org/10.1007/978-81-322-3625-2_4
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DOI: https://doi.org/10.1007/978-81-322-3625-2_4
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