Getting Started to Explore “Integrated Nanoelectronics” Chapter First Online: 17 September 2016
Part of the
NanoScience and Technology
book series (NANO) Abstract
A prelude to the subject is provided by delving into the present scenario and research trends in nanoelectronics and relating them to the organization of contents of the book. The chapter will provide a snapshot into the diversity of topical coverage and their mutual interrelationship, serving as a launching pad to begin exploration of this vast field.
Keywords Single Electron Transistor Molybdenum Disulphide Space Charge Region Width CMOS Configuration CMOS Structure
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
Review Exercises 1.1
Give three examples illustrating the impact of nanotechnology on the performance of integrated circuits.
Name a semiconductor device which has been the main “burden bearer” of IC industry.
Name three nanotechnological allies of CMOS technology which are used to enhance its capabilities.
Explain what is meant by a short-channel MOSFET? What phenomena plague the performance of such MOSFETs? What basic idea is applied to deal with these phenomena?
What does the acronym “SOI” stand for? Describe the arrangement of layers in an SOI wafer.
What is the dimensionality shift in MOSFET geometry from planar to FINFET and multigate devices? Why was it necessary?
Which nanophotonic phenomenon concerned with metals is widely used in nanosensors? Is it possible to perform logic operations optically?
NEMS complement nanoelectronics through sensors and actuators. Give some examples.
Nanobiotechnology complements nanoelectronics via nanobiosensors. Give examples.
What types of spintronic memories are used in nanoelectronics? Cite two examples.
Which tunneling-based devices are useful for nanoelectronics?
What is Coulomb blockade effect? Is it possible to make voltage-based logic circuits using single electron transistor?
Is it possible to grow silicon nanowires of required diameters at defined positions on a wafer?
Can carbon nanotube transistors be fabricated without doping?
Why is graphene said to be a supermaterial? What is its principal drawback?
In what respect is a two-dimensional dichalcogenide superior to graphene?
Can we altogether avoid the use of transistors for computation? What computational paradigms do not use transistors?
What are the switching devices used in rapid single flux quantum logic? How are logic high and logic low states represented in this system?
What are the rudimentary functional units used in molecular electronics?
What fabrication approach is followed in normal semiconductor chip manufacturing? Bottom-up or top-down. Can optical lithographic technique be used for patterning layers at nanoscale?
Can you name two bottom-up fabrication techniques?
What types of scanning probe microscopes do you know?
Name two kinds of X-ray-based measurement techniques.
Name three types of spectroscopic methods.
What is the instrument used to characterize vibrating objects?
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Collaert N (ed) (2013) CMOS nanoelectronics: innovative devices, architectures and applications. Pan Stanford Publishing Pte. Ltd., 438 pp