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Design of Low Power Efficient Median Filter for Noise Reduction in Image

  • M. VinothiniEmail author
  • B. Syed Ibrahim
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 394)

Abstract

In this paper, designing of the median filter is done with help of the comparator and multiplexer. In image processing, as median filter is an important factor to reduce salt and pepper noise, it is essential to develop a new design technique to reduce the power consumption. So the comparator and multiplexer design used in the median filter is designed using various styles of the full adder with help of DSCH and Microwind tool.

Keywords

Multiplexer Full adder (FA) Comparator Power 

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Copyright information

© Springer India 2016

Authors and Affiliations

  1. 1.ECE DepartmentChettinad College of EngineeringKarurIndia

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