Static Noise Margin Analysis of 6T SRAM Cell
This report describes the SNM calculation and analysis of SRAM cell which are obtained from simulations performed in Cadence Virtuoso 90 nm technology. The SRAM cell structure is implemented with a compact structure of six transistors. Static noise margin is found from the butterfly curve obtained for read, write, and hold modes of operation.
KeywordsSNM Butterfly Cadence
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