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Physical Mechanism of BTI Degradation—Direct Estimation of Trap Generation and Trapping

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Fundamentals of Bias Temperature Instability in MOS Transistors

Part of the book series: Springer Series in Advanced Microelectronics ((MICROELECTR.,volume 52))

Abstract

In this chapter, direct characterization techniques have been used to access the trap generation and trapping subcomponents of BTI degradation in HKMG MOSFETs having different gate stack processes. Generation of new traps is estimated using DCIV for NBTI stress and both DCIV and SILC for PBTI stress respectively in p- and n-channel MOSFETs. Flicker noise is used to estimate the density of process related pre-existing gate insulator traps responsible for hole and electron trapping respectively during NBTI and PBTI stress. The spatial and energetic locations of generated traps for NBTI and PBTI stress are identified. The time, bias, and temperature dependencies of trap generation obtained using the DCIV technique are compared between NBTI and PBTI stress, while these parameters obtained using DCIV and SILC techniques are compared for PBTI stress. The relative dominance of trap generation and trapping on NBTI and PBTI threshold voltage degradation is estimated for different gate insulator processes.

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Acknowledgment

The authors would like to acknowledge Nilesh Goel for ultrafast NBTI measurements, Bijesh Rajamohanan for flicker noise measurements, Applied Materials for providing devices used for experiments and Ankush Chaudhary for editorial support.

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  1. Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, 400076, India

    Subhadeep Mukhopadhyay & Souvik Mahapatra

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  1. Subhadeep Mukhopadhyay
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Correspondence to Souvik Mahapatra .

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  1. IIT Bombay, Mumbai, India

    Souvik Mahapatra

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Mukhopadhyay, S., Mahapatra, S. (2016). Physical Mechanism of BTI Degradation—Direct Estimation of Trap Generation and Trapping. In: Mahapatra, S. (eds) Fundamentals of Bias Temperature Instability in MOS Transistors. Springer Series in Advanced Microelectronics, vol 52. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2508-9_3

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  • DOI: https://doi.org/10.1007/978-81-322-2508-9_3

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